Arshad Aziz

发表

A Low Cost Structurally Optimized Design for Diverse Filter Types

Majida Kazmi, Arshad Aziz, Pervez Akhtar, 2016, PloS one.

Resource-Shared Crypto-Coprocessor of AES Enc/Dec With SHA-3

Arshad Aziz, Chenghua Wang, Dur-e Shahwar Kundi, 2020, IEEE Transactions on Circuits and Systems I: Regular Papers.

Software implementation of Standard Hash Algorithm (SHA-3) Keccak on Intel core-i5 and Cavium Networks Octeon Plus embedded platform

Arshad Aziz, Aisha Malik, Dure-e-Shahwar Kundi, 2013, 2013 2nd Mediterranean Conference on Embedded Computing (MECO).

Non Sub-sampled Contourlet Transform Based Feature Extraction Technique for Differentiating Glioma Grades Using MRI Images

Arshad Aziz, Pervez Akhtar, Razia Zia, 2017, Australasian Conference on Artificial Intelligence.

A high performance ST-Box based unified AES encryption/decryption architecture on FPGA

Arshad Aziz, Nassar Ikram, Dur-e-Shahwar Kundi, 2016, Microprocess. Microsystems.

An FPGA-based AES-CCM Crypto Core For IEEE 802.11i Architecture

Arshad Aziz, Nassar Ikram, 2007, Int. J. Netw. Secur..

Medical image denoising based on adaptive thresholding in contourlet domain

Majida Kazmi, Arshad Aziz, Pervez Akhtar, 2012, 2012 5th International Conference on BioMedical Engineering and Informatics.

Optimal utilization of available reconfigurable hardware resources

Athar Mahboob, Arshad Aziz, Kashif Latif, 2011, Comput. Electr. Eng..

An efficient and compact row buffer architecture on FPGA for real-time neighbourhood image processing

Majida Kazmi, Arshad Aziz, Pervez Akhtar, 2017, Journal of Real-Time Image Processing.

An efficient single unit T-box/T-1-box implementation for 128-bit AES on FPGA

Majida Kazmi, Arshad Aziz, Dur-e-Shahwar Kundi, 2015, Secur. Commun. Networks.

Memory Efficient Implementation of AES S-Boxes on FPGA

Arshad Aziz, Nassar Ikram, 2007, J. Circuits Syst. Comput..

Resource Efficient Implementation of Keccak, Skein & JH Algorithms on Reconfigurable Platform

Arshad Aziz, Dur-e-Shahwar Kundi, Kashif Latif, 2016 .

FPGA Based Compact and Efficient Full Image Buffering for Neighborhood Operations

Majida Kazmi, Arshad Aziz, Pervez Akhtar, 2015 .

Simulation design of an efficient MTI processing module for embedded platform

Arshad Aziz, Munaza Yousuf, Riaz Mahmud, 2013, 2013 2nd Mediterranean Conference on Embedded Computing (MECO).

Xilinx System Generator® Based Implementation of a Novel Method of Extraction of Nonstationary Sinusoids

Arshad Aziz, Pervez Akhtar, Muhammad Abubakar, 2013 .

Compact hardware implementation of SHA-3 finalist blake on FPGA

Muhammad Arsalan, Arshad Aziz, Muhammad Ata-ur-Rehman, 2013, 2013 IEEE 9th International Conference on Emerging Technologies (ICET).

Reduced Precision Redundancy for Satellite Telecommand Receiver Module on FPGA

Arshad Aziz, Salman Sadruddin, 2013 .

A new rectangular window based image cropping method for generalization of brain neoplasm classification systems

Arshad Aziz, Pervez Akhtar, Razia Zia, 2018, Int. J. Imaging Syst. Technol..

Efficient FPGA Implementation of Secure Hash Algorithm Grøstl – SHA-3 Finalist

Athar Mahboob, Arshad Aziz, Kashif Latif, 2012 .

Logically Optimized Smallest FPGA Architecture for SHA- 3 Core

Arshad Aziz, Thomas Newe, Muzaffar Rao, 2013 .

Multi-resolution transforms-based hybrid feature extraction technique for differentiating glioma grades

Arshad Aziz, Pervez Akhtar, Razia Zia, 2018, Int. J. Wavelets Multiresolution Inf. Process..

Efficient resource utilization of FPGAs

Athar Mahboob, Arshad Aziz, Kashif Latif, 2009, FIT.

An Efficient Software Implementation of AES-CCM for IEEE 802.11i Wireless St

Arshad Aziz, Nassar Ikram, Abdul Samiah, 2007, 31st Annual International Computer Software and Applications Conference (COMPSAC 2007).

Efficient Implementation of AES for the Resource Constrained Reconfigurable Platforms.

Arshad Aziz, 2007 .

Implementation of SHA-3 candidate skein on two unexplored multiprocessor platforms

Abdul Qadeer, Arshad Aziz, Aisha Malik, 2013, PROCEEDINGS OF 2013 International Conference on Sensor Network Security Technology and Privacy Communication System.

Area Efficient Implementation of MTI Processing Module on a Reconfigurable Platform

Arshad Aziz, Munaza Yousuf, Riaz Mahmud, 2014 .

Comparative Analysis of High Speed and Low Area Architectures of Blake SHA-3 Candidate on FPGA

Muhammad Arsalan, Arshad Aziz, 2012, 2012 10th International Conference on Frontiers of Information Technology.

Resource efficient implementation of T-Boxes in AES on Virtex-5 FPGA

Arshad Aziz, Nassar Ikram, Dur-e-Shahwar Kundi, 2010, Inf. Process. Lett..

Compact implementation of SHA3-512 on FPGA

Arshad Aziz, Alia Arshad, Dur-e-Shahwar Kundi, 2014, 2014 Conference on Information Assurance and Cyber Security (CIACS).

Resource-Efficient Image Buffer Architecture for Neighborhood Processors

Majida Kazmi, Arshad Aziz, H. R. Khan, 2020, IEEE Access.

A low-power SHA-3 designs using embedded digital signal processing slice on FPGA

Arshad Aziz, Dur-e-Shahwar Kundi, D. Kundi, 2016, Comput. Electr. Eng..

A unified approach to secure and robust hashing scheme for image and video authentication

Arshad Aziz, Nighat Jamil, 2010, 2010 3rd International Congress on Image and Signal Processing.

A Pareto-Optimal Multi-filter Architecture on FPGA for Image Processing Applications

Majida Kazmi, Arshad Aziz, Dur-e-Shahwar Kundi, 2019, Circuits Syst. Signal Process..

Efficient Utilization of FPGA Using LUT-6 Architecture

Arshad Aziz, Pervez Akhtar, Muzaffar Rao, 2012 .

Look-Up Table Based Implementations of SHA-3 Finalists: JH, Keccak and Skein

Athar Mahboob, Arshad Aziz, Kashif Latif, 2012, KSII Trans. Internet Inf. Syst..

FPGA based efficient architecture for image watermarking using Wavelet Co-efficients Quantization

Arshad Aziz, Pervez Akhtar, Jamal Ahmed, 2014, 2014 International Conference on Open Source Systems & Technologies.

Efficient Hardware Implementation of Secure Hash Algorithm (SHA-3) Finalist - Skein

Muhammad Tariq, Athar Mahboob, Arshad Aziz, 2011, ICFCE.

A compact AES encryption core on Xilinx FPGA

Arshad Aziz, Dur-e-Shahwar Kundi, Saleha Zaka, 2009, 2009 2nd International Conference on Computer, Control and Communication.

High Throughput Hardware Implementation of Secure Hash Algorithm (SHA-3) Finalist: BLAKE

Athar Mahboob, Arshad Aziz, Kashif Latif, 2011, 2011 Frontiers of Information Technology.

Efficient Hardware Implementation of SHA-3 Candidate Grøstl using FPGA

Arshad Aziz, Syed Muhammad Adnan, 2012 .

A FPGA Based Two Level Optimized Local Filter Design for High Speed Image Processing Applications

Majida Kazmi, Arshad Aziz, Pervez Akhtar, 2016 .

A Look-Up-Table Implementation of AES

Arshad Aziz, Nassar Ikram, 2007, HPCNCS.

FPGA Implementation of Advance Encryption Standard Using Xilinx System Generator

Arshad Aziz, Alia Arshad, Dur-e-Shahwar Kundi, 2014 .

Novel Arithmetic Architecture for High Performance Implementation of SHA-3 Finalist Keccak on FPGA Platforms

Athar Mahboob, Arshad Aziz, Kashif Latif, 2012, ARC.

Efficient Hardware Implementations and Hardware Performance Evaluation of SHA-3 Finalists

Athar Mahboob, Arshad Aziz, Kashif Latif, 2012 .

HARDWARE IMPLEMENTATION OF AES-CCM FOR ROBUST SECURE WIRELESS NETWORK

Arshad Aziz, Nassar Ikram, 2005 .

Women Councilors for Women's Empowerment in Pakistan

Arshad Aziz, Iqtidar Ali Shah, M. Shakil Ahmad, 2015 .