Sylvain Bouquet

Design and characterisation of an AES chip embedding countermeasures

Bruno Robisson, Assia Tria, Michel Agoyan, 2011, Int. J. Intell. Eng. Informatics.

LDO-Assisted Voltage Selector Over 0.5-to-1V VDD Range for Fine Grained DVS in FDSOI 28nm with 200ns/V Controlled Transition

Gaël Pillonnet, Ivan Miro Panades, Anthony Quelen, 2018, ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC).

Management of the security in smart secure devices

Bruno Robisson, Pirouz Bazargan-Sabet, Franck Wajsbürt, 2011 .

Design of a duplicated fault-detecting AES chip and yet using clock set-up time violations to extract 13 out of 16 bytes of the secret key

Bruno Robisson, Assia Tria, Michel Agoyan, 2011 .