David B. Whalley

发表

Reducing the cost of conditional transfers of control by using comparison specifications

Gary S. Tyson, William C. Kreahling, Stephen Roderick Hines, 2006, LCTES.

Supporting the specification and analysis of timing constraints

David B. Whalley, Lo Ko, Christopher A. Healy, 1996, Proceedings Real-Time Technology and Applications.

Reducing set-associative L1 data cache energy by early load data dependence detection (ELD3)

David B. Whalley, Alen Bardizbanyan, Magnus Själander, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Reducing instruction fetch cost by packing instructions into register windows

Gary S. Tyson, Stephen Roderick Hines, David B. Whalley, 2005, 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'05).

Optimizing Transfers of Control in the Static Pipeline Architecture

David B. Whalley, Magnus Själander, Ryan Baird, 2015, LCTES.

Bounding loop iterations for timing analysis

David B. Whalley, Mikael Sjödin, Christopher A. Healy, 1998, Proceedings. Fourth IEEE Real-Time Technology and Applications Symposium (Cat. No.98TB100245).

Fast context switches: compiler and architectural support for preemptive scheduling

David B. Whalley, Theodore P. Baker, Jeffrey S. Snyder, 1995, Microprocess. Microsystems.

Appropriate Interfaces Between Design Tools, Languages, Compilers and Runtimes in Real-Time Systems (Panel)

David B. Whalley, Richard Gerber, Steven W. K. Tjiang, 1995, Workshop on Languages, Compilers, & Tools for Real-Time Systems.

Fast instruction cache performance evaluation using compile-time analysis

David B. Whalley, D. Whalley, 1992, SIGMETRICS '92/PERFORMANCE '92.

Improving Memory Hierarchy Performance for Irregular Applications Using Data and Computation Reorderings

Ken Kennedy, David B. Whalley, John M. Mellor-Crummey, 2001, International Journal of Parallel Programming.

Fast and efficient searches for effective optimization-phase sequences

Douglas L. Jones, Stephen Roderick Hines, David B. Whalley, 2005, TACO.

Reducing the cost of branches by using registers

David B. Whalley, Jack W. Davidson, 1990, [1990] Proceedings. The 17th Annual International Symposium on Computer Architecture.

Fast memory bank assignment for fixed-point digital signal processors

Yunheung Paek, David B. Whalley, Jeonghun Cho, 2004, TODE.

Program Differentiation

Gary S. Tyson, Stephen Roderick Hines, David B. Whalley, 2012, J. Circuits Syst. Comput..

Reducing the cost of branches by using registers

David B. Whalley, Jack W. Davidson, 1990, ISCA '90.

Coalescing Conditional Branches into Efficient Indirect Jumps

David B. Whalley, Gang-Ryung Uh, 1997, SAS.

Decoupling address generation from loads and stores to improve data access energy efficiency

David B. Whalley, Ryan Baird, Soner Önder, 2018, LCTES.

Validation of code-improving transformations for embeded systems

Xin Yuan, David B. Whalley, Robert A. van Engelen, 2003, SAC '03.

Guest Editorial

David B. Whalley, 2007, TECS.

Timing the WCET of embedded applications

David B. Whalley, Christopher A. Healy, Frank Mueller, 2004, Proceedings. RTAS 2004. 10th IEEE Real-Time and Embedded Technology and Applications Symposium, 2004..

Improving both the performance benefits and speed of optimization phase sequence searches

David B. Whalley, Prasad A. Kulkarni, Michael R. Jantz, 2010, LCTES '10.

Timing Constraint Specification and Analysis

David B. Whalley, Lo Ko, Christopher A. Healy, 1999, Softw. Pract. Exp..

Guaranteeing instruction fetch behavior with a lookahead instruction fetch engine (LIFE)

Yuval Peress, Gary S. Tyson, Stephen Roderick Hines, 2009, LCTES '09.

Fast instruction cache analysis via static cache simulation

David B. Whalley, Frank Mueller, D. Whalley, 1995, Proceedings of Simulation Symposium.

Parametric Timing Analysis

David B. Whalley, Christopher A. Healy, Frank Mueller, 2001, OM '01.

Practical exhaustive optimization phase order exploration and evaluation

Gary S. Tyson, David B. Whalley, Jack W. Davidson, 2009, TACO.

Tools for application-oriented performance tuning

David B. Whalley, Robert J. Fowler, John M. Mellor-Crummey, 2001, ICS '01.

Exhaustive optimization phase order space exploration

Gary S. Tyson, David B. Whalley, Jack W. Davidson, 2006, International Symposium on Code Generation and Optimization (CGO'06).

Ease: an environment for architecture study and experimentation

David B. Whalley, Jack W. Davidson, D. Whalley, 1990, SIGMETRICS '90.

Graphical visualization of compiler optimizations

David B. Whalley, Mickey R. Boyd, 1995, J. Program. Lang..

A design environment for addressing architecture and compiler interactions

David B. Whalley, Jack W. Davidson, D. Whalley, 1992, Inf. Softw. Technol..

Energy efficient data access techniques

David B. Whalley, 2014, ODES '14.

Finding effective optimization phase sequences

Yunheung Paek, David B. Whalley, Jack W. Davidson, 2003, LCTES '03.

Effective exploitation of a zero overhead loop buffer

David B. Whalley, Yuhong Wang, Gang-Ryung Uh, 1999, LCTES '99.

Branch elimination by condition merging

Xin Yuan, William C. Kreahling, David B. Whalley, 2005, Softw. Pract. Exp..

A journey toward obtaining our first NSF S-STEM (scholarship) grant

Gary S. Tyson, David B. Whalley, Zhenghao Zhang, 2014, SIGCSE '14.

Timing analysis for data caches and set-associative caches

David B. Whalley, Christopher A. Healy, Marion G. Harmon, 1997, Proceedings Third IEEE Real-Time Technology and Applications Symposium.

Methods for saving and restoring register values across function calls

David B. Whalley, Jack W. Davidson, D. Whalley, 1991, Softw. Pract. Exp..

On the Use of Compilers in DSP Laboratory Instruction

Douglas L. Jones, Stephen Roderick Hines, David B. Whalley, 2006, 2006 IEEE International Conference on Acoustics Speech and Signal Processing Proceedings.

Using de-optimization to re-optimize code

Stephen Roderick Hines, David B. Whalley, Jack W. Davidson, 2005, EMSOFT.

Compiler transformations for effectively exploiting a zero overhead loop buffer

Yunheung Paek, David B. Whalley, Yuhong Wang, 2005, Softw. Pract. Exp..

The worst-case execution-time problem—overview of methods and survey of tools

Jakob Engblom, David B. Whalley, Per Stenström, 2008, TECS.

Fast searches for effective optimization phase sequences

Douglas L. Jones, Stephen Roderick Hines, David B. Whalley, 2004, PLDI '04.

Techniques for Effectively Exploiting a Zero Overhead Loop Buffer

David B. Whalley, Yuhong Wang, Gang-Ryung Uh, 2000, CC.

Industrial Requirements for WCET Tools - Answers to the ARTIST Questionnaire

Jakob Engblom, David B. Whalley, Reinhard Wilhelm, 2003, WCET.

Tighter timing predictions by automatic detection and exploitation of value-dependent constraints

David B. Whalley, Christopher A. Healy, 1999, Proceedings of the Fifth IEEE Real-Time Technology and Applications Symposium.

A retargetable technique for predicting execution time of code segments

David B. Whalley, Marion G. Harmon, Theodore P. Baker, 2005, Real-Time Systems.

Proceedings of the 17th ACM SIGPLAN/SIGBED Conference on Languages, Compilers, Tools, and Theory for Embedded Systems

Tei-Wei Kuo, David B. Whalley, 2016, LCTES.

Energy efficient data access techniques

David B. Whalley, 2014, LCTES '14.

Effectively exploiting indirect jumps

David B. Whalley, Gang-Ryung Uh, D. Whalley, 1999, Softw. Pract. Exp..

Supporting User-Friendly Analysis of Timing Constraints

David B. Whalley, Lo Ko, Marion G. Harmon, 1995, Workshop on Languages, Compilers, & Tools for Real-Time Systems.

VISTA: a system for interactive code improvement

Douglas L. Jones, David B. Whalley, Jack W. Davidson, 2002, LCTES/SCOPES '02.

ParaScale: exploiting parametric timing analysis for real-time schedulers and dynamic voltage scaling

David B. Whalley, Christopher A. Healy, Frank Mueller, 2005, 26th IEEE International Real-Time Systems Symposium (RTSS'05).

Enhancing the effectiveness of utilizing an instruction register file

Gary S. Tyson, David B. Whalley, 2008, 2008 IEEE International Symposium on Parallel and Distributed Processing.

Facilitating compiler optimizations through the dynamic mapping of alternate register structures

Gary S. Tyson, Stephen Roderick Hines, David B. Whalley, 2007, CASES '07.

Evaluating Heuristic Optimization Phase Order Search Algorithms

Gary S. Tyson, David B. Whalley, Prasad A. Kulkarni, 2007, International Symposium on Code Generation and Optimization (CGO'07).

Supporting Timing Analysis by Automatic Bounding of Loop Iterations

David B. Whalley, Mikael Sjödin, Christopher A. Healy, 2000, Real-Time Systems.

Addressing instruction fetch bottlenecks by using an instruction register file

Gary S. Tyson, Stephen Roderick Hines, David B. Whalley, 2007, LCTES '07.

Improving Data Access Efficiency by Using Context-Aware Loads and Stores

David B. Whalley, Alen Bardizbanyan, Magnus Själander, 2015, LCTES.

Branch Elimination via Multi-variable Condition Merging

Xin Yuan, William C. Kreahling, David B. Whalley, 2003, Euro-Par.

Timing Analysis for Data and Wrap-Around Fill Caches

David B. Whalley, Christopher A. Healy, Marion G. Harmon, 1999, Real-Time Systems.

An Overview of Static Pipelining

Ian Finlayson, Gary S. Tyson, David B. Whalley, 2012, IEEE Computer Architecture Letters.

Quick compilers using peephole optimization

David B. Whalley, Jack W. Davidson, D. Whalley, 1989, Softw. Pract. Exp..

Timing high performance kernels through empirical compilation

R. C. Whaley, David B. Whalley, R. Clint Whaley, 2005, 2005 International Conference on Parallel Processing (ICPP'05).

Using a Swap Instruction to Coalesce Loads and Stores

Apan Qasem, David B. Whalley, Xin Yuan, 2001, Euro-Par.

Bounding Pipeline and Instruction Cache Performance

David B. Whalley, Christopher A. Healy, Robert D. Arnold, 1999, IEEE Trans. Computers.

WCET code positioning

David B. Whalley, Christopher A. Healy, Frank Mueller, 2004, 25th IEEE International Real-Time Systems Symposium.

Fast, accurate design space exploration of embedded systems memory configurations

David B. Whalley, Jack W. Davidson, Jason Hiser, 2007, SAC '07.

Techniques for fast instruction cache performance evaluation

David B. Whalley, D. Whalley, 1993, Softw. Pract. Exp..

Automatic validation of code-improving transformations on low-level program representations

Xin Yuan, David B. Whalley, Robert A. van Engelen, 2004, Sci. Comput. Program..

Avoiding conditional branches by code replication

David B. Whalley, Frank Mueller, D. Whalley, 1995, PLDI '95.

Real-Time Debugging by Minimal Hardware Simulation

David B. Whalley, Marion G. Harmon, Frank Mueller, 1994, PEARL.

Designing a practical data filter cache to improve both energy efficiency and performance

David B. Whalley, Alen Bardizbanyan, Magnus Själander, 2013, ACM Trans. Archit. Code Optim..

Speculative tag access for reduced energy dissipation in set-associative L1 data caches

David B. Whalley, Alen Bardizbanyan, Magnus Själander, 2013, 2013 IEEE 31st International Conference on Computer Design (ICCD).

A retargetable technique for predicting execution time

David B. Whalley, Marion G. Harmon, Theodore P. Baker, 1992, [1992] Proceedings Real-Time Systems Symposium.

Relating Static and Dynamic Machine Code Measurements

David B. Whalley, Jack W. Davidson, John R. Rabung, 1992, IEEE Trans. Computers.

Redesigning a tagless access buffer to require minimal ISA changes

Sally A. McKee, David B. Whalley, Magnus Själander, 2016, 2016 International Conference on Compliers, Architectures, and Sythesis of Embedded Systems (CASES).

Integrating the timing analysis of pipelining and instruction caching

David B. Whalley, Christopher A. Healy, Marion G. Harmon, 1995, Proceedings 16th IEEE Real-Time Systems Symposium.

Bounding worst-case instruction cache performance

David B. Whalley, Robert D. Arnold, Marion G. Harmon, 1994, 1994 Proceedings Real-Time Systems Symposium.

VISTA: VPO interactive system for tuning applications

Xin Yuan, Yunheung Paek, Stephen Roderick Hines, 2006, TECS.

Efficient and effective branch reordering using profile data

David B. Whalley, Gang-Ryung Uh, Minghui Yang, 2002, TOPL.

Adapting compilation techniques to enhance the packing of instructions into registers

Gary S. Tyson, Stephen Roderick Hines, David B. Whalley, 2006, CASES '06.

Isolation and analysis of optimization errors

David B. Whalley, Mickey R. Boyd, D. Whalley, 1993, PLDI '93.

Automatic isolation of compiler errors

David B. Whalley, D. Whalley, 1994, TOPL.

Avoiding unconditional jumps by code replication

David B. Whalley, Frank Mueller, D. Whalley, 1992, PLDI '92.

Efficient register and memory assignment for non-orthogonal architectures via graph coloring and MST algorithms

Yunheung Paek, David B. Whalley, Jeonghun Cho, 2002, LCTES/SCOPES '02.

Practical way halting by speculatively accessing halt tags

David B. Whalley, Alen Bardizbanyan, Magnus Själander, 2016, 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Remix: On-demand Live Randomization

Yue Chen, Zhi Wang, David B. Whalley, 2016, CODASPY.

Efficient On-the-fly Analysis of Program Behavior and Static Cache Simulation

David B. Whalley, Frank Mueller, 1994, SAS.

Improving Energy Efficiency by Memoizing Data Access Information

David B. Whalley, Ryan Baird, Soner Önder, 2019, 2019 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED).

Improving WCET by applying worst-case path optimizations

William C. Kreahling, David B. Whalley, Christopher A. Healy, 2006, Real-Time Systems.

Improving WCET by applying a WC code-positioning optimization

David B. Whalley, Christopher A. Healy, Frank Mueller, 2005, TACO.

Scheduling instruction effects for a statically pipelined processor

Ian Finlayson, Gary S. Tyson, David B. Whalley, 2015, 2015 International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES).

On providing useful information for analyzing and tuning applications

David B. Whalley, Robert J. Fowler, John M. Mellor-Crummey, 2001, SIGMETRICS '01.

Improving program efficiency by packing instructions into registers

Gary S. Tyson, Stephen Roderick Hines, David B. Whalley, 2005, 32nd International Symposium on Computer Architecture (ISCA'05).

Automatic Detection and Exploitation of Branch Constraints for Timing Analysis

David B. Whalley, Christopher A. Healy, 2002, IEEE Trans. Software Eng..

Decreasing process memory requirements by overlapping program portions

David B. Whalley, Emily Ratliff, Richard L. Bowman, 1998, Proceedings of the Thirty-First Hawaii International Conference on System Sciences.

Improving WCET by optimizing worst-case paths

William C. Kreahling, David B. Whalley, Christopher A. Healy, 2005, 11th IEEE Real Time and Embedded Technology and Applications Symposium.

Automatic Validation of Code-Improving Transformations

David B. Whalley, Xin Yuan, Robert A. van Engelen, 2000, LCTES.

Introduction

David B. Whalley, Per Stenström, 2009, Trans. High Perform. Embed. Archit. Compil..

Generalizing parametric timing analysis

David B. Whalley, Christopher A. Healy, Frank Mueller, 2007, LCTES '07.

Guaranteeing Hits to Improve the Efficiency of a Small Instruction Cache

Gary S. Tyson, Stephen Roderick Hines, David B. Whalley, 2007, 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2007).

Improving Low Power Processor Efficiency with Static Pipelining

Ian Finlayson, Gary S. Tyson, David B. Whalley, 2011, 2011 15th Workshop on Interaction between Compilers and Computer Architectures.

Reducing instruction fetch energy in multi-issue processors

David B. Whalley, Magnus Själander, Peter Gavin, 2013, ACM Trans. Archit. Code Optim..

Timing analysis for sensor network nodes of the Atmega processor family

David B. Whalley, Christopher A. Healy, Frank Mueller, 2005, 11th IEEE Real Time and Embedded Technology and Applications Symposium.

Parametric timing analysis and its application to dynamic voltage scaling

David B. Whalley, Christopher A. Healy, Frank Mueller, 2011, TECS.

In search of near-optimal optimization phase orderings

Gary S. Tyson, David B. Whalley, Jack W. Davidson, 2006, LCTES '06.

Improving processor efficiency by statically pipelining instructions

Ian Finlayson, Gary S. Tyson, David B. Whalley, 2013, LCTES.

Improving performance by branch reordering

David B. Whalley, Gang-Ryung Uh, Minghui Yang, 1998, PLDI '98.

Improving data access efficiency by using a tagless access buffer (TAB)

Sally A. McKee, David B. Whalley, Alen Bardizbanyan, 2013, Proceedings of the 2013 IEEE/ACM International Symposium on Code Generation and Optimization (CGO).

Improving memory hierarchy performance for irregular applications

Ken Kennedy, David B. Whalley, John M. Mellor-Crummey, 1999, ICS '99.

Decreasing the Miss Rate and Eliminating the Performance Penalty of a Data Filter Cache

David B. Whalley, Soner Önder, Michael Stokes, 2021, ACM Trans. Archit. Code Optim..

A General Approach for Tight Timing Predictions of Non-Rectangular Loops

David B. Whalley, Christopher A. Healy, Robert A. van Engelen, 1999 .