Shoichiro Kawashima

A Split Level BUS for Low Power High Speed LSI's

Makoto Hamaminato, Shoichiro Kawashima, Isao Fukushi, 1999 .

The Application of FeRAM to Future Information Technology World

Amane Inoue, Toshiyuki Teramoto, Shoichi Masui, 2004 .

A fer Amplifier an Encoded Bus Amhikc ower S

Toshihiko Mori, Shigetoshi Wakayama, Makoto Hamaminato, 1997 .

An 8-Mbit 0.18-µm CMOS 1T1C FeRAM in Planar Technology

Yukinobu Hikosaka, Wensheng Wang, Yasuhiro Fujii, 2015, IEICE Trans. Electron..

High-speed sensing scheme in a 1V low-voltage contact-programming mask ROM

Makoto Hamaminato, Shoichiro Kawashima, R. Sasagawa, 2000 .

A Charge-Transfer-Amplifier and an Encoded-Bus Architecture for Low-Power SRAM's

Toshihiko Mori, Shigetoshi Wakayama, Makoto Hamaminato, 1997 .

Technique for Controlling Miyoshi Saito, Junji Ogawa, Effective Vth in Multi-Gbit DRAM Sense Amplifier

Hirotaka Tamura, Kohtaroh Gotoh, Shoichiro Kawashima, 1996 .

A Reliable 1T1C FeRAM Using a Thermal History Tracking 2T2C Dual Reference Level Technique for a Smart Card Application Chip

Toru Endo, Tomohisa Hirayama, Shoichiro Kawashima, 2007, IEICE Trans. Electron..