Ali Saeidi

Negative Capacitance as Performance Booster for Tunnel FETs and MOSFETs: An Experimental Study

Adrian M. Ionescu, Christian C. Enz, Farzan Jazaeri, 2017, IEEE Electron Device Letters.

Development of building vulnerability functions in subsidence regions from empirical methods

Olivier Deck, Thierry Verdel, Ali Saeidi, 2009 .

Modeling and simulation of low power ferroelectric non-volatile memory tunnel field effect transistors using silicon-doped hafnium oxide as gate dielectric

Adrian M. Ionescu, Ali Saeidi, Arnab Biswas, 2016 .

Negative capacitance field effect transistors; capacitance matching and non-hysteretic operation

Adrian M. Ionescu, Christian C. Enz, Farzan Jazaeri, 2017, 2017 47th European Solid-State Device Research Conference (ESSDERC).

Seismic loss estimation software: A comprehensive review of risk assessment steps, software development and limitations

Miroslav Nastev, Marie-José Nollet, Ali Saeidi, 2021 .

Condition for the negative capacitance effect in metal–ferroelectric–insulator–semiconductor devices

Ali Saeidi, Adrian M Ionescu, A. Ionescu, 2016, Nanotechnology.

Development of a damage simulator for the probabilistic assessment of building vulnerability in subsidence areas

Olivier Deck, Thierry Verdel, Ali Saeidi, 2015 .

Comparison of Building Damage Assessment Methods for Risk Analysis in Mining Subsidence Regions

Olivier Deck, Thierry Verdel, Ali Saeidi, 2013, Geotechnical and Geological Engineering.

Development of building vulnerability functions in subsidence regions from analytical methods

Olivier Deck, Thierry Verdel, Ali Saeidi, 2012 .

Double-Gate Negative-Capacitance MOSFET With PZT Gate-Stack on Ultra Thin Body SOI: An Experimentally Calibrated Simulation Study of Device Performance

Adrian M. Ionescu, Farzan Jazaeri, Igor Stolichnov, 2016, IEEE Transactions on Electron Devices.