Towards Open-HW: A Platform to Design, Share and Deploy FPGA Accelerators in Low Cost

Field-programmable gate array (FPGA) is a promising technology for the implementing of highperformance and power-efficient cloud computing by serving dedicated hardware as co-processor to accelerate loads on CPUs. However, developing an FPGA-based system is challenging because the complexity of the hardware and software co-design. In this paper, we propose a platform named hCODE to simplify the design, share, and deployment of FPGA accelerators. First, we adopt a shell-and-IP design pattern to improve the reusability and the portability of accelerator designs. Second, we implement an open accelerator repository to bridge hardware development and software development on one platform. On the hCODE platform, hardware developers can provide designs that follow hCODE specifications, which allowing software engineers to easily search, download, and integrate accelerators in their applications without caring about the hardware details.

[1]  Stylianos Perissakis,et al.  Stream computations organized for reconfigurable execution , 2006, Microprocess. Microsystems.

[2]  Miaoqing Huang,et al.  Archborn: an open source tool for automated generation of chip heterogeneous multiprocessor architectures , 2015, 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig).

[3]  Kizheppatt Vipin,et al.  System-level FPGA device driver with high-level synthesis support , 2013, 2013 International Conference on Field-Programmable Technology (FPT).

[4]  John Wawrzynek,et al.  Stream Computations Organized for Reconfigurable Execution (SCORE) , 2000, FPL.

[5]  Jim Stevens,et al.  Hthreads: A Computational Model for Reconfigurable Devices , 2006, 2006 International Conference on Field Programmable Logic and Applications.

[6]  Yoav Freund,et al.  RIFFA: A Reusable Integration Framework for FPGA Accelerators , 2012, 2012 IEEE 20th International Symposium on Field-Programmable Custom Computing Machines.

[7]  James R. Larus,et al.  A reconfigurable fabric for accelerating large-scale datacenter services , 2014, 2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA).

[8]  Jason Helge Anderson,et al.  Source-level debugging for FPGA high-level synthesis , 2014, 2014 24th International Conference on Field Programmable Logic and Applications (FPL).