Abstract This paper analyzes signal distortion caused by nanometer-scale solder ball fractures. A solder ball fracture causes an intermittent open circuit on the transmission line. The resulting basic failure mechanism is a drop in signal voltage, due to the capacitance-induced Alternating Current (AC)-coupling effect (which is induced by the fractured solder ball). The two major contributing factors to this error are fracture height and the persisting duration of the consecutive same-logic-value signal. The required signal that induces a voltage drop, sufficient to detect nanometer-scale solder ball fractures, can be composed by repetition of certain signal patterns even for the I/O connections with run-length restrictions. The methodology is newly proposed to determine potential ranges of solder ball fractures. Test pattern generation is made by maximally exploiting the compounding effect of various sizes of same data bits to generate effective run-length that is larger than maximum run length for the purpose of detecting intermittent solder ball fractures. In DDR3 memory systems with 5-nm solder ball fractures, at least 29 bits of consecutive logic “1” or “0” signals are required to detect fractures. If the system has a maximum run-length of 10, 20, or 30 bits, the test signal—which has the equivalent voltage-dropping effect as 29-consecutive bits—can be generated with six, two, or one repetition of the test pattern, respectively; the test pattern is in the form of concatenated N-1 bits of consecutive logic “1” and 1 bit of logic “0” where N is the maximum run length. In addition, a SPICE simulation was conducted to confirm correlation between calculations and actual results. In the simulation, in order to detect a 5-nm solder ball fracture, at least 37 bits of consecutive signal were required.
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