Number Systems and Arithmetic
暂无分享,去创建一个
[1] Forrest Salter. High-Speed Transistorized Adder for a Digital Computer , 1960, IRE Trans. Electron. Comput..
[2] B. Sear. Kilomegacycle Tunnel-diode logic Circuits , 1962 .
[3] J. E. Meggitt,et al. Pseudo Division and Pseudo Multiplication Processes , 1962, IBM J. Res. Dev..
[4] Meier M. Lehman,et al. A Note on the Simultaneous-Carry-Generation System for High-Speed Adders , 1960, IRE Trans. Electron. Comput..
[5] T. Kilburn,et al. A parallel arithmetic unit using a saturated-transistor fast-carry circuit , 1960 .
[6] M. Lehman. High-Speed Digital Multiplication , 1957, IRE Trans. Electron. Comput..
[7] John N. Mitchell,et al. Computer Multiplication and Division Using Binary Logarithms , 1962, IRE Trans. Electron. Comput..
[8] J. L. Smith,et al. A One-Microsecond Adder Using One-Megacycle Circuitry , 1956, IRE Trans. Electron. Comput..
[9] Philip W. Cheney. A Digital Correlator Based on the Residue Number System , 1961, IRE Trans. Electron. Comput..
[10] Harold M. Lucal. Arithmetic Operations for Digital Computers Using a Modified Reflected Binary Code , 1959, IRE Trans. Electron. Comput..
[11] Andrew D. Booth,et al. A SIGNED BINARY MULTIPLICATION TECHNIQUE , 1951 .
[12] Harvey L. Garner. A Ring Model for the Study of Multiplication for Complement Codes , 1959, IRE Trans. Electron. Comput..
[13] Bruce Gilchrist,et al. Fast Carry Logic for Digital Computers , 1955, IRE Trans. Electron. Comput..
[14] Nicholas S. Szabó. Sign Detection in Nonredundant Residue Systems , 1962, IRE Trans. Electron. Comput..
[15] Jack Sklansky,et al. Conditional-Sum Addition Logic , 1960, IRE Trans. Electron. Comput..
[16] M. Lehman,et al. Skip Techniques for High-Speed Carry-Propagation in Binary Arithmetic Units , 1961, IRE Trans. Electron. Comput..
[17] Orest J. Bedrij. Carry-Select Adder , 1962, IRE Trans. Electron. Comput..
[18] Gernot Metze,et al. A Class of Binary Divisions Yielding Minimally Represented Quotients , 1962, IRE Trans. Electron. Comput..
[19] Algirdas Avizienis,et al. Signed-Digit Numbe Representations for Fast Parallel Arithmetic , 1961, IRE Trans. Electron. Comput..
[20] George W. Reitwiesner. The Determination of Carry Propagation Length for Binary Addition , 1960, IRE Trans. Electron. Comput..
[21] James E. Robertson,et al. A New Class of Digital Division Methods , 1958, IRE Trans. Electron. Comput..
[22] Jack Sklansky. An Evaluation of Several Two-Summand Binary Adders , 1960, IRE Trans. Electron. Comput..
[23] Gerald Estrin,et al. Organization of computer systems: the fixed plus variable structure computer , 1960, IRE-AIEE-ACM '60 (Western).
[24] Algirdas Avizienis,et al. On a Flexible Implementation of Digital Computer Arithmetic , 1962, IFIP Congress.
[25] Robert L. Ashenhurst,et al. Significant Digit Computer Arithmetic , 1958, IRE Trans. Electron. Comput..
[26] Aviezri S. Fraenkel. The Use of Index Calculus and Mersenne Primes for the Design of a High-Speed Digital Multiplier , 1961, JACM.
[27] Ronald M. Guffin. A Computer for Solving Linear Simultaneous Equations Using the Residue Number System , 1962, IRE Trans. Electron. Comput..
[28] H. Garner. The residue number system , 1959, IRE-AIEE-ACM '59 (Western).
[29] D. Aspinall,et al. A decimal adder using a stored addition table , 1958 .
[30] Robert S. Ledley,et al. An Algorithm for Rapid Binary Division , 1961, IRE Trans. Electron. Comput..
[31] O. L. Macsorley. High-Speed Arithmetic in Binary Computers , 1961, Proceedings of the IRE.
[32] William G. Daly,et al. A High-Speed Arithmetic Unit Using Tunnel Diodes , 1963, IEEE Trans. Electron. Comput..
[33] Robert L. Ashenhurst,et al. Unnormalized Floating Point Arithmetic , 1959, JACM.
[34] Gerald Estrin,et al. A Note on High-Speed Digital Multiplication , 1956, IRE Trans. Electron. Comput..
[35] C. V. Freiman,et al. Statistical Analysis of Certain Binary Division Algorithms , 1961, Proceedings of the IRE.
[36] Roy D. Merrill. Improving Digital Computer Performance Using Residue Number Theory , 1964, IEEE Trans. Electron. Comput..
[37] Jack E. Volder. The CORDIC Trigonometric Computing Technique , 1959, IRE Trans. Electron. Comput..
[38] M. Lehman. The Minimization of Assimilations in Binary Carry-Storage Arithmetic Units , 1963, IEEE Trans. Electron. Comput..
[39] Bertram Bussell,et al. Parallel Processing in a Restructurable Computer System , 1963, IEEE Trans. Electron. Comput..
[40] Meyer Tannenbaum,et al. Division and Overflow Detection in Residue Number Systems , 1962, IRE Trans. Electron. Comput..
[41] Antonin Svoboda. The numerical system of residual classes in mathematical machines , 1959, IFIP Congress.
[42] T. Kilburn,et al. Parallel addition in digital computers: a new fast 'carry' circuit , 1959 .
[43] D. B. Jarvis,et al. Transistor logic using current switching and routing techniques and its application to a fast 'carry' propagation adder , 1959 .
[44] James E. Robertson. Two's Complement Multiplication in Binary Parallel Digital Computers , 1955, IRE Trans. Electron. Comput..
[45] K. D. Tocher. TECHNIQUES OF MULTIPLICATION AND DIVISION FOR AUTOMATIC BINARY COMPUTERS , 1958 .