Example of combined algorithm development and architecture design

In many modern signal processing applications, in particular real-time and adaptive signal processing, it turns out that there is a strong relationship between the algorithms (nested-loop type) that compute solutions to problems and the architectures (parallel/pipeline like) onto which the algorithms can be or should be mapped. From this observation it is believed that, within this class of applications, development of algorithms and design of architectures could better be considered simultaneously or even interchangeably. The framework in which such algorithms and architectures can best be expressed and designed is that of flow graphs which naturally describe both computations and communications between computations. In order to ensure a consistent design methodology, it is necessary to have a generic model and well-defined methods with which such designs can beformally undertaken. We introduce these ingredients in this paper by analyzing the prototype application of linear equations solving.

[1]  Alle-Jan van der Veen,et al.  Time-varying computational networks: realization, lossless embedding, and structural factorization , 1992, Optics & Photonics.

[2]  K. Jainandunsing,et al.  A new class of parallel algorithms for solving systems of linear equations , 1989 .

[3]  Ed F. Deprettere,et al.  Systolic array implementation of nested loop programs , 1990, [1990] Proceedings of the International Conference on Application Specific Array Processors.

[4]  Ed F. Deprettere,et al.  Parallel architecture for a pel-recursive motion estimation algorithm , 1992, CompEuro 1992 Proceedings Computer Systems and Software Engineering.

[5]  Miodrag Potkonjak,et al.  Fast prototyping of datapath-intensive architectures , 1991, IEEE Design & Test of Computers.

[6]  Peter Pirsch,et al.  Array architectures for block matching algorithms , 1989 .

[7]  Lothar Thiele,et al.  On the design of piecewise regular processor arrays , 1989, IEEE International Symposium on Circuits and Systems,.

[8]  Jürgen Teich,et al.  Control generation in the design of processor arrays , 1991, J. VLSI Signal Process..

[9]  R. Jain,et al.  Hi-PASS: a computer-aided synthesis system for maximally parallel digital signal processing ASICs , 1992, [Proceedings] ICASSP-92: 1992 IEEE International Conference on Acoustics, Speech, and Signal Processing.

[10]  Ed F. Deprettere,et al.  Processor clustering for the design of optimal fixed-size systolic arrays , 1991, Proceedings of the International Conference on Application Specific Array Processors.

[11]  Jeffrey D Ullma Computational Aspects of VLSI , 1984 .

[12]  P. Pirsch,et al.  Advances in picture coding , 1985, Proceedings of the IEEE.

[13]  Ed F. Deprettere,et al.  Parallel and adaptive high-resolution direction finding , 1994, IEEE Trans. Signal Process..