Development of a three-dimensional integrated image sensor with pixel-parallel signal processing architecture

A prototype sensor was built to demonstrate a 3D integrated CMOS image sensor that incorporates pixel-parallel signal processing architecture. FDSOI substrates with photodiodes and in-pixel ADC circuits were directly bonded after surface activation by plasma treatment. X, Y and θ alignment errors of 20 bonded samples were reduced to within ±0.7 μm, ±0.4 μm, and ±0.004°, respectively by using IR camera system. The resulting sensor successfully captured video images, thus demonstrating the feasibility of 3D integration technology and pixel-parallel architecture for future CMOS image sensors.

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