BDD Based Fault-Tree Processing

[1]  Nagisa Ishiura,et al.  Shared binary decision diagram with attributed edges for efficient Boolean function manipulation , 1990, 27th ACM/IEEE Design Automation Conference.

[2]  Masahiro Fujita,et al.  Variable ordering algorithms for ordered binary decision diagrams and their evaluation , 1993, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[3]  Masahiro Fujita,et al.  Evaluation and improvement of Boolean comparison method based on binary decision diagrams , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.

[4]  Randal E. Bryant,et al.  Symbolic Boolean manipulation with ordered binary-decision diagrams , 1992, CSUR.

[5]  Marc Bouissou An ordering heuristic for building binary decision diagrams from fault-trees , 1996, Proceedings of 1996 Annual Reliability and Maintainability Symposium.

[6]  Albert R. Wang,et al.  Logic verification using binary decision diagrams in a logic synthesis environment , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.

[7]  C. L. Berman Ordered binary decision diagrams and circuit structure , 1989, Proceedings 1989 IEEE International Conference on Computer Design: VLSI in Computers and Processors.