Energy considerations in multichip-module based multiprocessors

Multichip modules permit highly efficient implementation of tiled architectures. If the tiles are implemented in submicron CMOS, extremely highly computation rates can be achieved, but power dissipation becomes the principal factor limiting achievable levels of integration and performance. Some examples of tiled architectures are described. The feasibility and advantages of reduced voltage operation for reducing energy per operation in power constrained environments are discussed.<<ETX>>

[1]  Stephen Wolfram,et al.  Theory and Applications of Cellular Automata , 1986 .

[2]  Adir Bar-Lev,et al.  Semiconductors and electronic devices , 1979 .

[3]  R. M. Swanson.  Complementary MOS transistors in micropower circuits , 1975 .

[4]  D. Hammerstrom,et al.  A VLSI architecture for high-performance, low-cost, on-chip learning , 1990, 1990 IJCNN International Joint Conference on Neural Networks.

[5]  Guy E. Blelloch,et al.  Network Learning on the Connection Machine , 1987, IJCAI.

[6]  I. G. BONNER CLAPPISON.  Editor , 1960, The Electric Power Engineering Handbook - Five Volume Set.

[7]  Max Stanford Tomlinson,et al.  A digital neural network architecture for VLSI , 1990, 1990 IJCNN International Joint Conference on Neural Networks.

[8]  Arthur W. Burks,et al.  Essays on cellular automata , 1970 .

[9]  Carver Mead,et al.  Analog VLSI and neural systems , 1989 .

[10]  S. Kung,et al.  VLSI Array processors , 1985, IEEE ASSP Magazine.

[11]  A. J. De Groot,et al.  Systolic Implementation Of Neural Network , 1989, Photonics West - Lasers and Applications in Science and Engineering.

[12]  Max Stanford Tomlinson,et al.  DNNA: A Digital Neural Network Architecture , 1990 .

[13]  D. S. Touretzky,et al.  Neural network simulation at Warp speed: how we got 17 million connections per second , 1988, IEEE 1988 International Conference on Neural Networks.

[14]  Resve Saleh,et al.  Analysis and Design of Digital Integrated Circuits , 1983 .

[15]  A. Andreou,et al.  Characterization of CMOS Process Variations by Measuring Subthreshold Current , 1991 .

[16]  Yannis Tsividis,et al.  Design of Mos Vlsi Circuits for Telecommunications , 1985 .

[17]  H. T. Kung.  Why systolic architectures? , 1982, Computer.

[18]  Jerome Rothstein.  Bus automata, brains, and mental models , 1988, IEEE Trans. Syst. Man Cybern..