Constrained conditional resource sharing in pipeline synthesis

A conditional resource-sharing algorithm for pipeline synthesis is presented. It allows sharing of hardware components among the mutually exclusive parts of any conditional branches appearing in a behavioral description. If done improperly, resource sharing in a conditional branch can increase its critical path delay excessively, causing performance degradation. Given area/time constraints for a pipelined design, finding an optimal conditional sharing solution is a combinatorial optimization problem. The algorithm uses heuristics with a user-defined weight that trades off area versus time; the algorithm is either manually or automatically iterated by changing the weight until a solution close to the target is obtained or is determined to be impossible to obtain. The algorithm is interactive, so designers can manually determine partial or whole sharing.<<ETX>>