Low-voltage CMOS four-quadrant analogue multiplier for RF applications
暂无分享,去创建一个
[1] Peter R. Kinget,et al. A 1-GHz CMOS up-conversion mixer , 1997 .
[2] Chung-Yu Wu,et al. A parallel structure for CMOS four-quadrant analog multipliers and its application to a 2-GHz RF downconversion mixer , 1998 .
[3] M.A.F. Borremans,et al. A 2-V, low distortion, 1-GHz CMOS up-conversion mixer , 1998 .
[4] A. Karanicolas. A 2.7 V 900 MHz CMOS LNA and mixer , 1996, 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.
[5] Chuan Yi Tang,et al. A 2.|E|-Bit Distributed Algorithm for the Directed Euler Trail Problem , 1993, Inf. Process. Lett..