Low-voltage CMOS four-quadrant analogue multiplier for RF applications

A CMOS four-quadrant multiplier consisting of four MOS transistors operating in the saturation region is introduced. The circuit exploits the quadratic relation between the current and voltage of the MOS transistor in saturation. Simulation results show that, for a supply voltage of 1.2 V multiplication can be performed at a frequency of 1.8 GHz, achieving better performances than a recently proposed similar architecture.