Semi-analytical techniques for substrate characterization in the design of mixed-signal ICs

A number of methods are presented for highly efficient calculation of substrate current transport. A three-dimensional Green's Function based substrate representation, in combination with the use of the Fast Fourier Transform, significantly speeds up the computation of sensitivities with respect to all parameters associated with a given architecture. Substrate sensitivity analysis is used in a number of physical optimization tools, such as placement and trend analysis for the estimation of the impact of technology migration and/or layout re-design.

[1]  Shoichi Masui,et al.  Experimental results and modeling techniques for substrate noise in mixed-signal integrated circuits , 1993 .

[2]  Andrew T. Yang,et al.  Mixed-signal switching noise analysis using Voronoi-tessellated substrate macromodels , 1995, DAC '95.

[3]  Alberto Sangiovanni-Vincentelli,et al.  A module generator for high-speed CMOS current output digital/analog converters , 1996 .

[4]  Wen Wang,et al.  Chip Substrate Resistance Modeling Technique for Integrated Circuit Design , 1984, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[5]  Rob A. Rutenbar,et al.  Addressing substrate coupling in mixed-mode ICs: simulation and power distribution synthesis , 1994, IEEE J. Solid State Circuits.

[6]  Rob A. Rutenbar,et al.  Substrate-aware mixed-signal macro-cell placement in WRIGHT , 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.

[7]  E. Charbon,et al.  SUBWAVE: a methodology for modeling digital substrate noise injection in mixed-signal ICs , 1996, Proceedings of Custom Integrated Circuits Conference.

[8]  T. Smedes,et al.  Substrate Resistance Extraction for Physics-based Layout Verification , 1993 .

[9]  Alberto L. Sangiovanni-Vincentelli,et al.  Constraint generation for routing analog circuits , 1991, DAC '90.

[10]  Keng L. Wong,et al.  A PLL clock generator with 5 to 110 MHz lock range for microprocessors , 1992, 1992 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

[11]  Welch,et al.  A simple approach to modeling cross-talk in integrated circuits , 1993 .

[12]  E. Charbon,et al.  A Constraint-driven Placement Methodology For Analog Integrated Circuits , 1992, 1992 Proceedings of the IEEE Custom Integrated Circuits Conference.

[13]  P. R. Gray,et al.  Computer simulation of integrated circuits in the presence of electrothermal interaction , 1976 .

[14]  David J. Allstot,et al.  Electrothermal simulation of integrated circuits , 1993 .