Time Using the Vernier delay stage-to-digital converter

The present invention using a vernier delay stage high-resolution time reduce the delay mismatch (delay mismatch) - coarse (coarse), which relates to a digital converter and, more particularly, includes an N number of the buffer delay chain are connected in series (1) time-to-digital converter; And (2), said coarse time - is connected to the coarse stage is associated to receive signals from the digital converter, a fine (fine) time, including vernier delay stage-but-digital converter, said coarse time-to-digital converter in the phase difference and the transfer of the digital converter characterized in that on the configuration - a using a buffer delay, converted to a digital value, and wherein the remaining fine time phase difference. The present invention time using vernier delay stage proposed in - according to digital converter, N: 1 multiplexer, and by using a dual delay locked loop, it is possible to reduce the delay mismatch, and as a result the process, voltage, regardless of the temperature change it is possible to obtain a certain resolution.