Analysis and Design of Class-E Power Amplifier With MOSFET Parasitic Linear and Nonlinear Capacitances at Any Duty Ratio

This paper presents analytical expressions for the class-E power amplifier with MOSFET linear gate-to-drain and nonlinear drain-to-source parasitic capacitances at any duty ratio. The maximum operating frequency, output power capability, and element values as functions of the duty ratio are obtained. The element values are directly dependent upon the selection of duty ratio and require a careful duty ratio selection to minimize component power losses and to maximize the total efficiency. Two design examples at 25 and 9 W output power at 4-MHz operating frequency along with the PSpice-simulation and experimental waveforms are presented. It is shown from the derived expressions that the slope of the voltage across the MOSFET gate-to-drain parasitic capacitance during the switch-off state as a function of the duty ratio affects the switch-voltage waveform. Therefore, it is possible to achieve the required peak switch voltage and the class-E ZVS/ZVDS conditions simultaneously by adjusting the duty ratio. The theoretical results and PSpice simulations agreed with experimental results quantitatively, which shows the validity of the presented analysis.

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