A Mixed Timing System-Level Embedded Software Modelling and Simulation Approach

System-level software modeling and simulation have become important techniques for real-time embedded system early design space exploration. However, the timing accuracy issues have not been solved well in current methods, which produce unrealistic results or large simulation overheads. In this paper, we propose a mixed timing modeling and simulation approach to decouple conventionally interdependent software timing modeling and simulation into two separate phases. This approach enables (1) mixed software timing information granularities and annotation methods at the modeling stage for performance and accuracy trade-off (2) good software preemption and hardware interrupt handling timing accuracy at the simulation stage without sacrificing simulation performance (3) varying system run-time status observability and simulation speed for efficiency trade-off. Experiments demonstrate that our approach has flexible simulation performance trade-offs and good simulation timing accuracy. The measured results indicate that hardware interruption and software preemption problems are also solved by our approach.

[1]  Norbert Wehn,et al.  Embedded Software for SoC , 2003, Springer US.

[2]  Jan Madsen,et al.  A System C-Based Abstract Real-Time Operating System Model for Multiprocessor Systems-on-Chips , 2005 .

[3]  Ahmed Amine Jerraya,et al.  ChronoSym: a new approach for fast and accurate SoC cosimulation , 2005, Int. J. Embed. Syst..

[4]  Andreas Gerstlauer,et al.  RTOS scheduling in transaction level models , 2003, First IEEE/ACM/IFIP International Conference on Hardware/ Software Codesign and Systems Synthesis (IEEE Cat. No.03TH8721).

[5]  Frank Ghenassia Transaction-Level Modeling with SystemC: TLM Concepts and Applications for Embedded Systems , 2010 .

[6]  Aloysius K. Mok,et al.  Timed RTOS modeling for embedded system design , 2005, 11th IEEE Real Time and Embedded Technology and Applications Symposium.

[7]  Kiyoung Choi,et al.  Fast cycle-approximate MPSoC simulation based on synchronization time-point prediction , 2007, Des. Autom. Embed. Syst..

[8]  Daniel D. Gajski,et al.  SPECC: Specification Language and Methodology , 2000 .

[9]  Eugenio Villar,et al.  Real-Time Operating System modeling in SystemC for HW / SW co-simulation , 2022 .

[10]  Eugenio Villar,et al.  RTOS modeling in SystemC for real-time embedded SW simulation: A POSIX model , 2005, Des. Autom. Embed. Syst..

[11]  Ahmed Amine Jerraya,et al.  Timed HW-SW cosimulation using native execution of OS and application SW , 2002, Seventh IEEE International High-Level Design Validation and Test Workshop, 2002..

[12]  Daniel Gajski,et al.  Transaction level modeling: an overview , 2003, First IEEE/ACM/IFIP International Conference on Hardware/ Software Codesign and Systems Synthesis (IEEE Cat. No.03TH8721).

[13]  Andrew N. Sloss,et al.  ARM System Developer's Guide: Designing and Optimizing System Software , 2004 .

[14]  Mark A. Gonzales,et al.  Abstract rtos modelling in systemc , 2002 .

[15]  Gunar Schirner,et al.  Introducing Preemptive Scheduling in Abstract RTOS Models using Result Oriented Modeling , 2008, 2008 Design, Automation and Test in Europe.

[16]  Altamiro Amadeu Susin,et al.  Abstract RTOS modeling for embedded systems , 2004, Proceedings. 15th IEEE International Workshop on Rapid System Prototyping, 2004..

[17]  Sorin A. Huss,et al.  Real-Time Operating System Services for Realistic SystemC Simulation Models of Embedded Systems , 2004, FDL.

[18]  Andreas Gerstlauer,et al.  RTOS modeling for system level design , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[19]  Frank Ghenassia,et al.  Transaction Level Modeling with SystemC , 2005 .