A New Three-Phase Multi-Level Asymmetrical Inverter With Optimum Hardware Components

In this article, a novel three-phase asymmetrical multilevel inverter is presented. The proposed inverter is designed with an optimal hardware components to generate three-phase nineteen output voltage levels. The proposed inverter exhibits various advantages like a suitable output voltage waveform with improved power quality, lower total harmonic distortion (THD), and more moderate complexity, reduction in cost, reduced power losses, and improved efficiency. A comparison of the proposed topology in terms of several parameters with existing methods illustrates its merits and features. The proposed inverter tested with steady-state and dynamic load disturbances. Various experimental results are included in this article to validate the performance of the proposed inverter during various extremities. In addition, a detailed comparison is tabulated between simulation and experimental results graphically. The proposed inverter has been stable even during load disturbance conditions. The simulation and feasibility model are verified using a prototype model.

[1]  Saad Mekhilef,et al.  Dual Vector Control Strategy for a Three-Stage Hybrid Cascaded Multilevel Inverter , 2010 .

[2]  Saad Mekhilef,et al.  Design and Implementation of a Multi Level Three-Phase Inverter with Less Switches and Low Output Voltage Distortion , 2009 .

[3]  Ebrahim Babaei,et al.  Symmetric multilevel inverter with reduced components based on non-insulated dc voltage sources , 2012 .

[4]  Thierry Meynard,et al.  Multi-Level Choppers for High Voltage Applications , 1992 .

[5]  Sanjeevikumar Padmanaban,et al.  Design and implementation of a novel asymmetrical multilevel inverter optimal hardware components , 2020, International Transactions on Electrical Energy Systems.

[6]  Ebrahim Babaei,et al.  New Extendable 15-Level Basic Unit for Multilevel Inverters , 2016, J. Circuits Syst. Comput..

[7]  Jun Liang,et al.  Modified Phase-Shifted PWM Control for Flying Capacitor Multilevel Converters , 2007, IEEE Transactions on Power Electronics.

[8]  Mehdi Seyedmahmoudian,et al.  Switched‐capacitor‐based boost multilevel inverter topology with higher voltage gain , 2020, IET Power Electronics.

[9]  Bor-Ren Lin,et al.  An eight-switch three-phase VSI for power factor regulated shunt active filter , 2004 .

[10]  J. N. Park,et al.  Quasi-linear IGBT inverter topologies , 1994, Proceedings of 1994 IEEE Applied Power Electronics Conference and Exposition - ASPEC'94.

[11]  E. Babaei,et al.  A Cascade Multilevel Converter Topology With Reduced Number of Switches , 2008, IEEE Transactions on Power Electronics.

[12]  Ivo Barbi,et al.  Fundamentals of a new diode clamping multilevel inverter , 2000 .

[13]  A. Rufer,et al.  Control of a hybrid asymmetric multilevel inverter for competitive medium-voltage industrial drives , 2003, IEEE Transactions on Industry Applications.

[14]  Y. Lai,et al.  Topology for hybrid multilevel inverter , 2002 .

[15]  Saad Mekhilef,et al.  A New Multilevel Inverter Topology With Reduce Switch Count , 2019, IEEE Access.

[16]  R. Echavarria,et al.  Cascade multilevel inverter with only one DC source , 2002, VIII IEEE International Power Electronics Congress, 2002. Technical Proceedings. CIEP 2002..

[17]  Mehran Sabahi,et al.  New hybrid structure for multilevel inverter with fewer number of components for high-voltage levels , 2014 .

[18]  Hirofumi Akagi,et al.  A New Neutral-Point-Clamped PWM Inverter , 1981, IEEE Transactions on Industry Applications.

[19]  Ivo Barbi,et al.  Three-phase Cascaded multilevel inverter using power cells with two inverter legs in series , 2009, 2009 IEEE Energy Conversion Congress and Exposition.

[20]  M. Fracchia,et al.  Optimized modulation techniques for the generalized N-level converter , 1992, PESC '92 Record. 23rd Annual IEEE Power Electronics Specialists Conference.

[21]  J. Dixon,et al.  High-level multistep inverter optimization using a minimum number of power transistors , 2006, IEEE Transactions on Power Electronics.

[22]  Kai-Ming Tsang,et al.  Single DC source three-phase multilevel inverter using reduced number of switches , 2014 .

[23]  S. Selvakumar,et al.  An efficient new hybrid cascaded H-bridge inverter for photovoltaic system , 2014, 2014 2nd International Conference on Devices, Circuits and Systems (ICDCS).

[24]  Saad Mekhilef,et al.  A New Configurable Topology for Multilevel Inverter With Reduced Switching Components , 2020, IEEE Access.

[25]  N.A. Rahim,et al.  Modelling of three-phase uniform symmetrical sampling digital PWM for power converter , 2004, 2004 IEEE 35th Annual Power Electronics Specialists Conference (IEEE Cat. No.04CH37551).

[26]  C. Dhanamjayulu,et al.  Real-Time Implementation of a 31-Level Asymmetrical Cascaded Multilevel Inverter for Dynamic Loads , 2019, IEEE Access.

[27]  A. V. Rajkumar,et al.  Modeling and Simulation of Five-level Five-phase Voltage Source Inverter for Photovoltaic Systems , 2013 .

[28]  Feel-soon Kang,et al.  A modified cascade transformer-based multilevel inverter and its efficient switching function , 2009 .

[29]  T.A. Meynard,et al.  Multi-level conversion: high voltage choppers and voltage-source inverters , 1992, PESC '92 Record. 23rd Annual IEEE Power Electronics Specialists Conference.

[30]  Reza Barzegarkhoo,et al.  Symmetric hybridised design for a novel step-up 19-level inverter , 2017 .

[31]  Thomas A. Lipo,et al.  Hybrid multilevel power conversion system: a competitive solution for high power applications , 1999 .

[32]  M. Sabahi,et al.  Harmonics elimination in a multilevel inverter with unequal DC sources using genetic algorithm , 2011, 2011 International Conference on Electrical Machines and Systems.

[33]  A Ghosh,et al.  A Hybrid Cascade Converter Topology With Series-Connected Symmetrical and Asymmetrical Diode-Clamped H-Bridge Cells , 2009, IEEE Transactions on Power Electronics.

[34]  E. Babaei,et al.  A new topology for multilevel inverter considering its optimal structures , 2013 .

[35]  Vassilios G. Agelidis,et al.  SHE-PWM control for asymmetrical hybrid multilevel flying capacitor and H-bridge converter , 2011, 2011 IEEE Ninth International Conference on Power Electronics and Drive Systems.

[36]  F. Blaabjerg,et al.  Power electronics as efficient interface in dispersed power generation systems , 2004, IEEE Transactions on Power Electronics.

[37]  Rainer Marquardt,et al.  An innovative modular multilevel converter topology suitable for a wide power range , 2003, 2003 IEEE Bologna Power Tech Conference Proceedings,.

[38]  M. Rivera,et al.  A New Topology of Multilevel Inverter with Reduced Part Count , 2018, 2018 IEEE International Conference on Automation/XXIII Congress of the Chilean Association of Automatic Control (ICA-ACCA).

[39]  Anup Kumar Panda,et al.  Design and Development of a Novel 19-Level Inverter Using an Effective Fundamental Switching Strategy , 2018, IEEE Journal of Emerging and Selected Topics in Power Electronics.

[40]  K. Gopakumar,et al.  Asymmetric Multilevel Converter for High Resolution Voltage Phasor Generation , 1999 .

[41]  Fang Zheng Peng,et al.  Multilevel inverters: a survey of topologies, controls, and applications , 2002, IEEE Trans. Ind. Electron..

[43]  C. Dhanamjayulu,et al.  Implementation and Comparison of Symmetric and Asymmetric Multilevel Inverters for Dynamic Loads , 2018, IEEE Access.

[44]  Hew Wooi Ping,et al.  New multilevel inverter topology with minimum number of switches , 2010, TENCON 2010 - 2010 IEEE Region 10 Conference.

[45]  Ebrahim Babaei,et al.  Charge Balance Control Methods for a Class of Fundamental Frequency Modulated Asymmetric Cascaded Multilevel Inverters , 2011 .

[46]  Alfred Rufer,et al.  Control of a hybrid asymmetric multilevel inverter for competitive medium-voltage industrial drives , 2003, IEEE Transactions on Industry Applications.

[47]  Mohamad Reza Banaei,et al.  Z-source-based multilevel inverter with reduction of switches , 2012 .