Design of an application specific instruction set processor for parametric speech synthesis

Parametric speech synthesizers utilize digital parameterized source-filter models for modeling the process of production of human speech. They are used in speech synthesis systems with an unlimited vocabulary. Presently, they are available as C language codes that run on PC platforms. They require a moderately high throughput of a mix of floating-point DSP functions and non-DSP (general-purpose) type computations. For embedded unlimited vocabulary speech synthesis systems, therefore, a need has been felt for the design of an Application Specific Integrated Processor for parametric speech synthesis. The present work describes the design of an Application Specific Instruction Set Processor (ASIP) for parametric speech synthesis that can serve the needs of embedded speech synthesis systems.

[1]  Michael Gschwind,et al.  Instruction set selection for ASIP design , 1999, Proceedings of the Seventh International Workshop on Hardware/Software Codesign (CODES'99) (IEEE Cat. No.99TH8450).

[2]  G.E. Moore,et al.  Cramming More Components Onto Integrated Circuits , 1998, Proceedings of the IEEE.

[3]  Joseph P. Olive The talking computer: text to speech synthesis , 2001 .

[4]  TingTing Hwang,et al.  A power-driven multiplication instruction-set design method for ASIPs , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[5]  Jason Cong,et al.  Application-specific instruction generation for configurable processor architectures , 2004, FPGA '04.

[6]  Kiyoung Choi,et al.  Energy-efficient instruction set synthesis for application-specific processors , 2003, ISLPED '03.

[7]  Ing-Jer Huang,et al.  Generating instruction sets and microarchitectures from applications , 1994, ICCAD.

[8]  Masaharu Imai,et al.  An integrated design environment for application specific integrated processor , 1991, [1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors.

[9]  Rainer Leupers,et al.  ASIP Design and Synthesis for Non Linear Filtering in Image Processing , 2006, Proceedings of the Design Automation & Test in Europe Conference.

[10]  Ing-Jer Huang,et al.  Synthesis of application specific instruction sets , 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[11]  Tim Good,et al.  Very small FPGA application-specific instruction processor for AES , 2006, IEEE Transactions on Circuits and Systems I: Regular Papers.

[12]  Heinrich Meyr,et al.  LISA—machine description language for cycle-accurate models of programmable DSP architectures , 1999, DAC '99.

[13]  Sharad Malik,et al.  Processor evaluation in an embedded systems design environment , 2000, VLSI Design 2000. Wireless and Digital Imaging in the Millennium. Proceedings of 13th International Conference on VLSI Design.

[14]  Daniel Foty,et al.  Perspectives on scaling theory and CMOS technology - understanding the past, present, and future , 2004, Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004..

[15]  Nick Tredennick Microprocessor logic design: The flowchart method , 1987 .

[16]  Anshul Kumar,et al.  ASIP design methodologies: survey and issues , 2001, VLSI Design 2001. Fourteenth International Conference on VLSI Design.

[17]  Alexandru Nicolau,et al.  Performance evaluation for application-specific architectures , 1995, IEEE Trans. Very Large Scale Integr. Syst..

[18]  Peter Marwedel,et al.  Evaluating register file size in ASIP design , 2001, CODES '01.

[19]  Dennis H. Klatt,et al.  Software for a cascade/parallel formant synthesizer , 1980 .

[20]  Anshul Kumar,et al.  An efficient technique for exploring register file size in ASIP synthesis , 2002, CASES '02.

[21]  Nikil D. Dutt,et al.  EXPRESSION: a language for architecture exploration through compiler/simulator retargetability , 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

[22]  Takao Nishitani,et al.  A knowledge-based retargetable compiler for application specific signal processors , 1989, IEEE International Symposium on Circuits and Systems,.

[23]  Chandra Shekhar,et al.  Application Specific Instruction Set Processors: redefining hardware-software boundary , 2004, 17th International Conference on VLSI Design. Proceedings..

[24]  Paolo Ienne,et al.  Automatic application-specific instruction-set extensions under microarchitectural constraints , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

[25]  Yoshinori Takeuchi,et al.  A performance maximization algorithm to design ASIPs under the constraint of chip area including RAM and ROM sizes , 1998, Proceedings of 1998 Asia and South Pacific Design Automation Conference.

[26]  Youn-Long Lin,et al.  Code generation for a DSP processor , 1994, Proceedings of 7th International Symposium on High-Level Synthesis.

[27]  Heinrich Meyr,et al.  A novel methodology for the design of application-specificinstruction-set processors (ASIPs) using a machine description language , 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[28]  D H Klatt,et al.  Review of text-to-speech conversion for English. , 1987, The Journal of the Acoustical Society of America.

[29]  木村 康則,et al.  20世紀の名著名論:Gordon Moore: Cramming More Components onto Integrated Circuits , 2005 .

[30]  Masaharu Imai,et al.  An ASIP instruction set optimization algorithm with functional module sharing constraint , 1993, ICCAD.

[31]  Hoon Choi,et al.  Synthesis of application specific instructions for embedded DSP software , 1998, ICCAD '98.

[32]  Alessandro De Gloria,et al.  An evaluation system for application specific architectures , 1990, MICRO 23.

[33]  Michael Gschwind,et al.  FPGA prototyping of a RISC processor core for embedded applications , 2001, IEEE Trans. Very Large Scale Integr. Syst..

[34]  Masaharu Imai,et al.  An integer programming approach to instruction implementation method selection problem , 1992, Proceedings EURO-DAC '92: European Design Automation Conference.

[35]  Hugo De Man,et al.  Instruction set definition and instruction selection for ASIPs , 1994, Proceedings of 7th International Symposium on High-Level Synthesis.

[36]  T. C. May,et al.  Instruction-set matching and selection for DSP and ASIP code generation , 1994, Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC.

[37]  Nuno Roma,et al.  Application Specific Instruction Set Processor for Adaptive Video Motion Estimation , 2006, 9th EUROMICRO Conference on Digital System Design (DSD'06).

[38]  Scott Mahlke,et al.  Automatically generating custom instruction set extensions , 2002 .

[39]  Sang-Joon Nam,et al.  MetaCore: an application-specific programmable DSP development system , 2000, IEEE Trans. Very Large Scale Integr. Syst..

[40]  Stamatis Vassiliadis,et al.  Automatic selection of application-specific instruction-set extensions , 2006, Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS '06).