Design of a 20 MHz DC-DC Buck Converter with 84 Percent Efficiency for Portable Applications

This paper presents the design and implementation of a 20 MHz voltage mode DC-DC buck converter with high power efficiency. The power efficiency has been improved by minimising the short circuit current in the driver stage. At the same time, a high gain, wide-band error amplifier topology with reduced current consumption, improves various dynamic performance parameters such as settling time, load and line regulations of the converter. A prototype of a 20 MHz DCDC buck converter is implemented and fabricated in 0.5 ?m Bi-CMOS process with a maximum of 600 mA load current driving capability in the input voltage range of 2.7-5.5 V which is suitable for single-cell lithiumion (Li-Ion) battery operated portable applications. A reasonably good settling time of 10 ?s is observed in the measured result with off-chip filter components of L=270 nH, C=1.6 ?F. The measured value of load regulation and line regulation are 1.6 mV/A and 3 mV/V respectively. A maximum of 84% power efficiency is achieved at 2.7 V to 1.2 V conversion. A very low form factor of 2.5 mm× 2.5 mm× 0.7 mm, has been achieved by using power power flip-chip packaging technology.

[1]  Amit Patra,et al.  High-gain wideband error amplifier topology for DC-DC buck converter switching at 20 MHz , 2008 .

[2]  Jiann-Jong Chen,et al.  A monolithic CMOS step-down DC-DC converter , 2005, 48th Midwest Symposium on Circuits and Systems, 2005..

[3]  Jiann-Jong Chen,et al.  A monolithic buck DC-DC converter with on-chip PWM circuit , 2007, Microelectron. J..

[4]  Jeongjin Roh,et al.  High-performance error amplifier for fast transient DC-DC converters , 2005, IEEE Transactions on Circuits and Systems II: Express Briefs.

[5]  Ke-Horng Chen,et al.  On-Chip Compensated Error Amplifier for Fast Transient DC-DC Converters , 2006, 2006 IEEE International Conference on Electro/Information Technology.

[6]  Vivek De,et al.  Monolithic DC-DC converter analysis and MOSFET gate voltage optimization , 2003, Fourth International Symposium on Quality Electronic Design, 2003. Proceedings..

[7]  Robert W. Brodersen,et al.  A low-voltage CMOS DC-DC converter for a portable battery-operated system , 1994, Proceedings of 1994 Power Electronics Specialist Conference - PESC'94.

[8]  Ke-Horng Chen,et al.  Fast-Transient DC–DC Converter With On-Chip Compensated Error Amplifier , 2006, IEEE Transactions on Circuits and Systems II: Express Briefs.

[9]  B. Bakkaloglu,et al.  A Multi-Stage Interleaved Synchronous Buck Converter with Integrated Output Filter in a 0.18/spl mu/ SiGe process , 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.