A novel structure of the fully differential CMOS amplifier with symmetric active load

In this article, we propose a novel general structure of a linear symmetric fully differential voltage amplifier with a symmetric output. It is applicable to all sets of complementary component pairs such as BJT, JFET and MOSFET. We demonstrate the superiority of the proposed circuit in comparison with the state-of-the-art solutions. The characteristics are illustrated in both frequency and time domains, and a comparison is given between the proposed amplifier and the traditional differential amplifier with a current mirror as an active load for the same set of complementary components in CMOS equally sized W/L = 150/3 technology. The static voltage transfer characteristic of the proposed amplifier has an extremely small linearity error. The deviation from the linear characteristics is less than 0.018 mV for the amplitude of the output differential voltage of 1 Vpp. The common-mode gain by symmetric output is negligible because the proposed structure is fully symmetric. The simulation results demonstrate the efficiency of the proposed amplifier.

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