A pass transistor regular structure for implementing multi-level combinational circuits

Implementation of multi-level combinational circuits using pass transistors and transmission gates is presented. The circuits are built with a new set of pass transistor gates, creating a network with well defined logic values at any node. A method to identify certain logic patterns is presented with the goal to reduce the number of pass transistor gates required to implement a logic function. SPICE simulations verified by the simulation of an example circuit show significant speed improvements for combinational circuits designed with pass transistor gates.<<ETX>>