A Novel Adaptive Routing Algorithm for Network-On-Chip

In this paper, we propose a novel adaptive routing algorithm to solve the communication congestion problem for Network-on-Chip (NoC). The strategy competing for output ports in both X and Y directions is employed to utilize the output ports of the router sufficiently, and to reduce the transmission latency and improve the throughput. Experimental results show that the proposed algorithm is very effective in relieving the communication congestion, and a reduction in average latency by 45.7% and an improvement in throughput by 44.4% are achieved compared with the deterministic XY routing algorithm and the simple XY adaptive routing algorithm.

[1]  William J. Dally.  Virtual-Channel Flow Control , 1992, IEEE Trans. Parallel Distributed Syst..

[2]  Wei Hwang,et al.  An adaptive congestion-aware routing algorithm for mesh network-on-chip platform , 2009, 2009 IEEE International SOC Conference (SOCC).

[3]  Edith Beigné,et al.  Design and Implementation of a GALS Adapter for ANoC Based Architectures , 2009, 2009 15th IEEE Symposium on Asynchronous Circuits and Systems.

[4]  Vincenzo Catania,et al.  A methodology for design of application specific deadlock-free routing algorithms for NoC systems , 2006, Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS '06).

[5]  Luca Benini,et al.  Networks on Chips : A New SoC Paradigm , 2022 .

[6]  Axel Jantsch,et al.  Network on Chip : An architecture for billion transistor era , 2000 .

[7]  William J. Dally,et al.  Route packets, not wires: on-chip inteconnection networks , 2001, DAC '01.

[8]  Mohsen Nickray,et al.  Adaptive routing using context-aware agents for networks on chips , 2009, 2009 4th International Design and Test Workshop (IDT).