Design and construction of the Very Simple Computer (VSC): a laboratory project for an undergraduate computer architecture course

The Very Simple Computer (VSC) was designed in class and breadboarded in the laboratory by the students of an undergraduate-level computer architectures course. The computer uses small and medium scale TTL integrated circuits. It has an 8-bit word with a 3-bit op-code and a 5-bit address, resulting in 8 instructions and 32 words of memory. The VSC uses a rocker switch input and directly monitors (with LEDs) the bus for the output. This relatively inexpensive project (<$100 including power supply, ICS, breadboards and assorted hardware) is a natural for a small computer science department on a limited budget. In addition to providing the students with a sense of accomplishment, the VSC raises many practical architecture issues not encounted when using laboratory simulators: This paper outlines a method for incorporating the design of the VSC into regular classroom lectures, and offers a number of recommendations for instructors who would consider using the VSC in their own course. Introduction A number of educators have used simple computer designs to provide a basis for classroom instruction. Notable examples are Sajjan Shiva’s ASC (A Simple Computer)l and A. K. Dewdney’s SCRAM (Simple but Complete Random Access Machine).z While these computers have no practical purpose beyond their educational value, they are both candidates for classroom laboratory projects. While the design of the VSC was heavily influenced by these two machines, the decision to take the system to hardware produced a slightly different set of design goals. First of all, the VSC has an instruction Permission to copy without fee all or part of this material is granted provided that the copies are not made or distributed for direct commercial advantage, the ACM copyright notice and the title of the publication and its date appear, and notice is given that copying is by permission of the Association for Computing Machinery. To copy otherwise, or to republish, requires a fee and/or specific permission. ACM-24thCSE-2/93 -lN, USA @ 1993 ACM 0.89791.566.6/93/0002/0151 . ..$1 .5(3 151 set size of 8 rather than 16 as provided for in the ASC. This decision was based on the simpler hardware configuration resulting from the smaller instruction set. Next, the VSC provides 32 words addressable memory rather than 16 as with the SCRAM. This was done to provide an example of chip-select circuit design in the memory unit. A block diagram of the VSC is shown in Figure 1. ,UInput/Output A<thmetic LogIG Umt ----------. . . . . . . . . . ----. . . . . -------.------. . . . . . . . .