PCM-Based Durable Write Cache for Fast Disk I/O
暂无分享,去创建一个
Dong Li | Jeffrey S. Vetter | Weikuan Yu | Zhuo Liu | Bin Wang | Patrick Carpenter | J. Vetter | Bin Wang | Dong Li | Weikuan Yu | Zhuo Liu | Patrick Carpenter
[1] Mary Baker,et al. Non-volatile memory for fast, reliable file systems , 1992, ASPLOS V.
[2] Mendel Rosenblum,et al. The design and implementation of a log-structured file system , 1991, SOSP '91.
[3] Seung-Ho Lim,et al. PFFS: a scalable flash memory file system for the hybrid architecture of phase-change RAM and NAND flash , 2008, SAC '08.
[4] Paul G. Spirakis,et al. Space Efficient Hash Tables with Worst Case Constant Access Time , 2003, Theory of Computing Systems.
[5] Vijayalakshmi Srinivasan,et al. Scalable high performance main memory system using phase-change memory technology , 2009, ISCA '09.
[6] Rajesh K. Gupta,et al. Onyx: A Prototype Phase Change Memory Storage Array , 2011, HotStorage.
[7] Xiaoning Ding,et al. DULO: an effective buffer cache management scheme to exploit both temporal and spatial locality , 2005, FAST'05.
[8] Xian Liu,et al. An algorithm for encoding and decoding the 3-D Hilbert order , 1997, IEEE Trans. Image Process..
[9] David Woodhouse,et al. JFFS : The Journalling Flash File System , 2001 .
[10] Qing Yang,et al. The Design and Implementation of a DCD Device Driver for Unix , 1999, USENIX Annual Technical Conference, General Track.
[11] Jin Li,et al. ChunkStash: Speeding Up Inline Storage Deduplication Using Flash Memory , 2010, USENIX Annual Technical Conference.
[12] Dharmendra S. Modha,et al. WOW: wise ordering for writes - combining spatial and temporal locality in non-volatile caches , 2005, FAST'05.
[13] Hsien-Hsin S. Lee,et al. Security refresh: prevent malicious wear-out and increase durability for phase-change memory with dynamically randomized address mapping , 2010, ISCA.
[14] Geoffrey H. Kuenning,et al. The Conquest file system: Better performance through a disk/persistent-RAM hybrid design , 2006, TOS.
[15] Yiran Chen,et al. A Hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement , 2010, HPCA - 16 2010 The Sixteenth International Symposium on High-Performance Computer Architecture.
[16] Jongmoo Choi,et al. Impact of NVRAM write cache for file system metadata on I/O performance in embedded systems , 2009, SAC '09.
[17] Gerhard Weikum,et al. The LRU-K page replacement algorithm for database disk buffering , 1993, SIGMOD Conference.
[18] Rasmus Pagh,et al. Cuckoo Hashing , 2001, Encyclopedia of Algorithms.
[19] Yuanyuan Zhou,et al. The Multi-Queue Replacement Algorithm for Second Level Buffer Caches , 2001, USENIX Annual Technical Conference, General Track.
[20] Geoffrey H. Kuenning,et al. Conquest: Better Performance Through a Disk/Persistent-RAM Hybrid File System , 2002, USENIX Annual Technical Conference, General Track.
[21] Jongmoo Choi,et al. Exploiting non-volatile RAM to enhance flash file system performance , 2007, EMSOFT '07.
[22] Xiaoning Ding,et al. DiskSeen: Exploiting Disk Layout and Access History to Enhance I/O Prefetch , 2007, USENIX Annual Technical Conference.
[23] Jongmoo Choi,et al. Write-aware buffer cache management scheme for nonvolatile RAM , 2007 .
[24] Mahesh Balakrishnan,et al. Extending SSD Lifetimes with Disk-Based Write Caches , 2010, FAST.
[25] Vijayalakshmi Srinivasan,et al. Enhancing lifetime and security of PCM-based Main Memory with Start-Gap Wear Leveling , 2009, 2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).
[26] Sang Lyul Min,et al. LRFU: A Spectrum of Policies that Subsumes the Least Recently Used and Least Frequently Used Policies , 2001, IEEE Trans. Computers.
[27] Suman Nath,et al. Rethinking Database Algorithms for Phase Change Memory , 2011, CIDR.
[28] Engin Ipek,et al. Dynamically replicated memory: building reliable systems from nanoscale resistive memories , 2010, ASPLOS XV.
[29] Guangyu Sun,et al. A Hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement , 2010, HPCA 2010.
[30] Song Jiang,et al. LIRS: an efficient low inter-reference recency set replacement policy to improve buffer cache performance , 2002, SIGMETRICS '02.
[31] Jun Yang,et al. A durable and energy efficient main memory using phase change memory technology , 2009, ISCA '09.