A low-power 8-bit SAR ADC for a QCIF image sensor

In this paper, we report on an 8-bit auto-calibrating successive-approximation-register (SAR) analog-to-digital converter (ADC) for ultra-low power image sensors. The fabricated design includes an on-chip bandgap voltage reference and a tunable clock generator in addition to the SAR ADC core circuitry. Aside from two power pins, the design uses only one extra pin to output the digitized samples serially. Power consumption for the design is 21µW at 0.8V supply voltage, and it is 32µW including ancillary circuits. The sampling rate varies from 370kS/s to 1.6MS/s depending on the supply voltage. The design occupies an area of 0.2mm2 in a 0.18µm CMOS process, of which 0.073mm2 is for the SAR ADC core.

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