A configurable platform for MPSoCs based on application specific instruction set processors

In this paper, we propose a configurable platform that supports the integration of configurable processors in a multiprocessor system on chip. This platform can be adapted to the application and the design constraints. The configuration of the platform is done through a graphical user interface generated through an XML parameterization file. We also present the platform design flow, including the configuration process. Results show that this platform allows producing, in a few hours, efficient designs that would take weeks to code manually. It opens the door to faster and more thorough exploration of the design space for MPSoCs design.

[1]  Zbysek Gajda A Core Generator for Multi-ALU Processors Utilized in Genetic Parallel Programming , 2006, 2006 IEEE Design and Diagnostics of Electronic Circuits and systems.

[2]  Steve Leibson,et al.  Configurable processors: a new era in chip design , 2005, Computer.

[3]  Wim Dehaene,et al.  UML for electronic systems design: a comprehensive overview , 2008, Des. Autom. Embed. Syst..

[4]  C. M. Sperberg-McQueen,et al.  Extensible Markup Language (XML) , 1997, World Wide Web J..

[5]  Nozomu Togawa,et al.  An interface-circuit synthesis method with configurable processor core in IP-based SoC designs , 2006, Asia and South Pacific Conference on Design Automation, 2006..

[6]  Z. Navabi,et al.  HDML: compiled VHDL in XML , 2000, Proceedings VHDL International Users Forum Fall Workshop.

[7]  Gabriela Nicolescu,et al.  Multiprocessor SoC platforms: a component-based design approach , 2002, IEEE Design & Test of Computers.

[8]  Grant Martin,et al.  Configurable Multi-Processor Platforms for Next Generation Embedded Systems , 2007, 2007 Asia and South Pacific Design Automation Conference.