Charge-Based MOS Transistor Modeling: The EKV Model for Low-Power and RF IC Design

Foreword. Preface. List of Symbols. 1. Introduction. 1.1 The Importance of Device Modeling for IC Design. 1.2 A Short History of the EKV MOST Model. 1.3 The Book Structure. PART I: THE BASIC LONG-CHANNELINTRINSIC CHARGE-BASED MODEL. 2. Introduction. 2.1 The N-channel Transistor Structure. 2.2 Definition of charges, current, potential and electric fields. 2.3 Transistor symbol and P-channel transistor. 3. The Basic Charge Model. 3.1 Poisson's Equation and Gradual Channel Approximation. 3.2 Surface potential as a Function of Gate Voltage. 3.3 Gate Capacitance. 3.4 Charge Sheet Approximation. 3.5 Density of Mobile Inverted Charge. 3.6 Charge-Potential Linearization. 4. Static Drain Current. 4.1 Drain Current Expression. 4.2 Forward and Reverse Current Components. 4.3 Modes of Operation. 4.4 Model of Drain Current Based on Charge Linearization. 4.5 Fundamental Property: Validity and Application. 4.6 Channel Length Modulation. 5. The Small-Signal Model. 5.1 The Static Small-Signal Model. 5.2 A General Non-Quasi-Static Small-Signal Model. 5.3 The Quasi-Static Dynamic Small-Signal Model. 6. The Noise Model. 6.1 Noise Calculation Methods. 6.2 Low-Frequency Channel Thermal Noise. 6.3 Flicker Noise. 6.4 Appendices. Appendix : The Nyquist and Bode Theorems. Appendix : General Noise Expression. 7. Temperature Effects and Matching. 7.1 Introduction. 7.2 Temperature Effects. PART II: THE EXTENDED CHARGE-BASED MODEL. 8. Non-Ideal Effects Related to the Vertical Dimension. 8.1 Introduction. 8.2 Mobility Reduction Due to the Vertical Field. 8.3 Non-Uniform Vertical Doping. 8.4 Polysilicon Depletion. 8.4.1 Definition of the Effect. 8.5 Band Gap Widening. 8.6 Gate Leakage Current. 9. Short-Channel Effects. 9.1 Velocity Saturation. 9.2 Channel Length Modulation. 9.3 Drain Induced Barrier Lowering. 9.4 Short-Channel Thermal Noise Model. 10. The Extrinsic Model. 10.1 Extrinsic Part of the Device. 10.2 Access Resistances. 10.3 Overlap Regions. 10.4 Source and Drain Junctions. 10.5 Extrinsic Noise Sources. PART III: THE HIGH-FREQUENCY MODEL. 11. Equivalent Circuit at RF. 11.1 RF MOS Transistor Structure and Layout. 11.2 What Changes at RF?. 11.3 Transistor Figures of Merit. 11.4 Equivalent Circuit at RF. 12. The Small-Signal Model at RF. 12.1 The Equivalent Small-Signal Circuit at RF. 12.2 Y-Parameters Analysis. 12.3 The Large-Signal Model at RF. 13. The Noise Model at RF. 13.1 The HF Noise Parameters. 13.2 The High-Frequency Thermal Noise Model. 13.3 HF Noise Parameters of a Common-Source Amplifier. References. Index.

[1]  D.B.M. Klaassen,et al.  Geometry Scaling of the Substrate Loss of RF MOSFETs , 1998, 28th European Solid-State Device Research Conference.

[2]  Frank Stern,et al.  Quantum properties of surface space-charge layers , 1973 .

[3]  A. Hoffmann,et al.  Overview of the impact of downscaling technology on 1/f noise in p-MOSFETs to 90 nm , 2004 .

[4]  H. Oguey,et al.  CODYMOS frequency dividers achieve low power consumption and high frequency , 1973 .

[5]  T. Melly,et al.  Design of high-Q varactors for low-power wireless applications using a standard CMOS process , 2000, IEEE Journal of Solid-State Circuits.

[6]  William Shockley,et al.  The Impedance Field Method of Noise Calculation in Active Semiconductor Devices , 1966 .

[7]  R. Gharpurey,et al.  RF MOSFET modeling accounting for distributed substrate and channel resistances with emphasis on the BSIM3v3 SPICE model , 1997, International Electron Devices Meeting. IEDM Technical Digest.

[8]  C. Enz,et al.  MOS transistor modeling for RF IC design , 2000, IEEE Journal of Solid-State Circuits.

[9]  K. Hess.  Advanced Theory of Semiconductor Devices , 1999 .

[10]  Matthias Bucher,et al.  Accounting for quantum effects and polysilicon depletion from weak to strong inversion in a charge-based design-oriented MOSFET model , 2003 .

[11]  P.G.A. Jespers,et al.  A fast sample and hold charge-sensing circuit for photodiode arrays , 1977, IEEE Journal of Solid-State Circuits.

[12]  Gerard Ghibaudo,et al.  Low-frequency noise and fluctuations in advanced CMOS devices , 2003, SPIE International Symposium on Fluctuations and Noise.

[13]  G. Perlegos,et al.  A 16Kb electrically erasable nonvolatile memory , 1980, 1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[14]  L. Vandamme,et al.  noise in series resistance of LDD MOSTs , 1992 .

[15]  Ulrich L. Rohde,et al.  Microwave Circuit Design Using Linear and Nonlinear Techniques: Vendelin/Microwave Circuit Design Using Linear and Nonlinear Techniques , 1990 .

[16]  F. M. Klaassen,et al.  Thermal noise of MOS transistors , 1967 .

[17]  Marc Pastre,et al.  Procedural analog design (PAD) tool , 2003, Fourth International Symposium on Quality Electronic Design, 2003. Proceedings..

[18]  Eric A. Vittoz.  The Design of High-Performance Analog Circuits on Digital CMOS Chips , 1985 .

[19]  T. Ohguro,et al.  Future perspective and scaling down roadmap for RF CMOS , 1999, 1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325).

[20]  R. van Langevelde,et al.  New Compact Model for Induced Gate Current Noise , 2003 .

[21]  Eugenio García Moreno,et al.  An Improved C∞-Continuous Small-Geometry MOSFET Modeling for Analog Applications , 1997 .

[22]  M. Lenzlinger,et al.  Fowler‐Nordheim Tunneling into Thermally Grown SiO2 , 1969 .

[23]  C. Galup-Montoro,et al.  A current-based model for the MOS transistor , 1997, Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97.

[24]  G. Reimbold,et al.  White noise of MOS transistors operating in weak inversion , 1982, IEEE Transactions on Electron Devices.

[25]  E. Vittoz.  MOS transistors operated in the lateral bipolar mode and their application in CMOS technology , 1983, IEEE Journal of Solid-State Circuits.

[26]  A.-S. Porret,et al.  Non-quasi-static (NQS) thermal noise modelling of the MOS transistor , 2004 .

[27]  K. Singhal,et al.  Intrinsic MOSFET capacitance coefficients , 2001 .

[28]  M. J. Deen,et al.  Channel noise modeling of deep submicron MOSFETs , 2002 .

[29]  J. Barker,et al.  On the physics and modeling of small semiconductor devices—I , 1980 .

[30]  D.B.M. Klaassen,et al.  A large signal non-quasi-static MOS model for RF circuit simulation , 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318).

[31]  F. Maloberti.  The MOS Transistor , 2003 .

[32]  Christian Enz,et al.  An Analytical Thermal Noise Model of the MOS Transistor Valid in All Modes of Operation , 2005 .

[33]  Christian Enz,et al.  The EKV 3.0 Compact MOS Transistor Model: Accounting for Deep-Submicron Aspects , 2002 .

[34]  Jung-Suk Goo,et al.  Physical origin of the excess thermal noise in short channel MOSFETs , 2001, IEEE Electron Device Letters.

[35]  Eric A. Vittoz,et al.  Micropower Techniques , 1994 .

[36]  C.C. Enz,et al.  Compact modeling of thermal noise in the MOS transistor , 2005, IEEE Transactions on Electron Devices.

[37]  E. Vittoz,et al.  Silicon-gate CMOS frequency divider for electronic wrist watch , 1972 .

[38]  J.D. Plummer,et al.  Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfaces , 1980, IEEE Transactions on Electron Devices.

[39]  R. M. Swanson,et al.  Ion-implanted complementary MOS transistors in low-voltage circuits , 1972 .

[40]  G. Gonzalez.  Microwave Transistor Amplifiers: Analysis and Design , 1984 .

[41]  M. Nagata,et al.  A precise MOSFET model for low-voltage circuits , 1974 .

[42]  Christian-Charles Enz,et al.  High precision CMOS micropower amplifiers , 1989 .

[43]  J.A.M. Geelen,et al.  An improved de-embedding technique for on-wafer high-frequency characterization , 1991, Proceedings of the 1991 Bipolar Circuits and Technology Meeting.

[44]  W. Grabinski,et al.  EKV v2.6 Parameter Extraction Tutorial , 2001 .

[45]  Thomas Skotnicki,et al.  Low frequency noise in thin gate oxide MOSFETs , 2001, Microelectron. Reliab..

[46]  Suet Fong Tin,et al.  Substrate network modeling for CMOS RF circuit simulation , 1999, Proceedings of the IEEE 1999 Custom Integrated Circuits Conference (Cat. No.99CH36327).

[47]  Yuhua Cheng,et al.  On the high-frequency characteristics of substrate resistance in RF MOSFETs , 2000, IEEE Electron Device Letters.

[48]  E. Morifuji,et al.  High-frequency AC characteristics of 1.5 nm gate oxide MOSFETs , 1996, International Electron Devices Meeting. Technical Digest.

[49]  Christian Enz,et al.  EKV 3.0: an Analog Design-Oriented MOS Transistor Model , 2002 .

[50]  Y. Tsividis.  Operation and modeling of the MOS transistor , 1987 .

[51]  Zou Xiao.  Threshold Voltage Model for Deep-Submicrometer MOSFET's , 2005 .

[52]  M. Schroter,et al.  Accurate MOS Transistor Modeling and Parameter Extraction Valid up to 10 GHz , 1998, 28th European Solid-State Device Research Conference.

[53]  J. P. Nougier,et al.  Differential relaxation times and diffusivities of hot carriers in isotropic semiconductors , 1977 .

[54]  Christian Enz.  MOS transistor modeling for RF integrated circuit design , 2000, Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044).

[55]  W. Heinrich,et al.  High-frequency FET noise performance: a new approach , 1989 .

[56]  S. Wang,et al.  A 256-bit nonvolatile static RAM , 1978, 1978 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[57]  Eric A. Vittoz.  Pseudo-Resistive Networks and their Applications to Analog Collective Computation , 1997, ICANN.

[58]  A.-S. Porret,et al.  A compact non-quasi-static extension of a charge-based MOS model , 2001 .

[59]  Matthias Bucher,et al.  Improved analytical modeling of polysilicon depletion in MOSFETs for circuit simulation , 2000 .

[60]  Gerson A. S. Machado,et al.  Estimating key parameters in the EKV MOST model for analogue design and simulation , 1995, International Symposium on Circuits and Systems.

[61]  Christian Enz,et al.  A Basic Property of MOS Transistors and its Circuit Implications , 2005 .

[62]  Carlos Galup-Montoro,et al.  An explicit MOSFET model for analog circuit simulation , 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems.

[63]  R. Troutman,et al.  Subthreshold characteristics of insulated-gate field-effect transistors , 1973 .

[64]  G. Geelen,et al.  An inherently linear and compact MOST-only current division technique , 1992 .

[65]  Alain-Serge Porret.  Design of a low-power and low-voltage UHF transceiver integrated in a CMOS process , 2002 .

[66]  M. S. Keshner.  1/f noise , 1982, Proceedings of the IEEE.

[67]  Matthias Bucher,et al.  An efficient parameter extraction methodology for the EKV MOST model , 1996, Proceedings of International Conference on Microelectronic Test Structures.

[68]  M. Bucher,et al.  Accounting for Quantum Effects and Polysilicon Depletion in an Analytical Design-Oriented MOSFET Model , 2001 .

[69]  D.B.M. Klaassen,et al.  Accurate thermal noise model for deep-submicron CMOS , 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318).

[70]  Thomas H. Lee,et al.  The Design of CMOS Radio-Frequency Integrated Circuits: RF CIRCUITS THROUGH THE AGES , 2003 .

[71]  R. Robson,et al.  Diffusivity of Charge Carriers in Semiconductors in Strong Electric Fields , 1973 .

[72]  Gerard Ghibaudo,et al.  MOSFET Compact Modeling Issues for Low Temperature (77 K – 200 K) Operation , 2008 .

[73]  F. M. Klaassen,et al.  Characterization of low 1/f noise in MOS transistors , 1971 .

[74]  Christian Enz,et al.  A Design Oriented Charge-based Current Model for Symmetric DG MOSFET and its Correlation with the EKV Formalism , 2005 .

[75]  E. Vittoz,et al.  An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications , 1995 .

[76]  E. Vittoz,et al.  A CMOS Chopper Amplifier , 1986, ESSCIRC '86: Twelfth European Solid-State Circuits Conference.

[77]  C. Mead,et al.  White noise in MOS transistors and resistors , 1993, IEEE Circuits and Devices Magazine.

[78]  Christian Enz,et al.  An MOS transistor model for RF IC design valid in all regions of operation , 2002 .

[79]  J. Brews.  A charge-sheet model of the MOSFET , 1978 .

[80]  Matthias Bucher,et al.  Simple solutions for modelling the non-uniform substrate doping , 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

[81]  K. Hess,et al.  Phenomenological Physics of Hot Carriers in Semiconductors , 1980 .

[82]  A.S. Roy,et al.  A closed-form charge-based expression for drain current in symmetric and asymmetric double gate MOSFET , 2005, Proceedings of 35th European Solid-State Device Research Conference, 2005. ESSDERC 2005..

[83]  Yannis Tsividis,et al.  Small-signal parameters and thermal noise of the four-terminal MOSFET in non-quasistatic operation , 1990 .

[84]  A. S. Grove,et al.  Surface effects on p-n junctions: Characteristics of surface space-charge regions under non-equilibrium conditions , 1966 .

[85]  H. Cho,et al.  A three-step method for the de-embedding of high-frequency S-parameter measurements , 1991 .

[86]  J. Fellrath.  Shot noise behaviour of subthreshold MOS transistors , 1978 .

[87]  H. Wallinga,et al.  Design and analysis of CMOS analog signal processing circuits by means of a graphical MOST model , 1989 .

[88]  H. Gummel,et al.  Inversion charge modeling , 2001 .

[89]  C. Sah,et al.  Effects of diffusion current on characteristics of metal-oxide (insulator)-semiconductor transistors☆ , 1966 .

[90]  K. M. van Vliet.  The transfer-impedance method for noise in field-effect transistors , 1979 .

[91]  Yuhua Cheng,et al.  MOS Transistor Modeling Issues for RF Circuit Design , 1999 .

[92]  Christian Enz,et al.  Extended Charges Modeling for Deep Submicron CMOS , 1999 .

[93]  Mark S. Lundstrom.  Fundamentals of Carrier Transport, 2nd edn , 2002 .

[94]  Matthias Bucher.  Analytical MOS transistor modelling for analog circuit simulation , 2000 .

[95]  Wolfgang Fichtner,et al.  Simulation of RF Noise in MOSFETs Using Different Transport Models , 2003 .

[96]  Robert W. Dutton,et al.  A bias dependent source/drain resistance model in LDD MOSFET devices for distortion analysis , 1999, ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361).

[97]  Fritz Leuenberger,et al.  Complementary-MOS Low-Power Low-Voltage Integrated Binary Counter , 2008, IEEE Solid-State Circuits Newsletter.

[98]  J. P. Nougier,et al.  Noise and Diffusion of Hot Carriers , 1980 .

[99]  Kwyro Lee,et al.  Analytical drain thermal noise current model valid for deep submicron MOSFETs , 2004, IEEE Transactions on Electron Devices.

[100]  J. Fellrath,et al.  New Analog CMOS IC'S Based on Weak Inversion Operation , 1976, ESSCIRC 76: 2nd European Solid State Circuits Conference.

[101]  Ping-Keung Ko,et al.  A physics-based MOSFET noise model for circuit simulators , 1990 .

[102]  K. R. Lakshmikumar,et al.  Characterisation and modeling of mismatch in MOS transistors for precision analog design , 1986 .

[103]  Willy Sansen,et al.  An easy-to-use mismatch model for the MOS transistor , 2002, IEEE J. Solid State Circuits.

[104]  M. B. Barron.  Low level currents in insulated gate field effect transistors , 1972 .

[105]  Brigitte Beneking.  High Speed Semiconductor Devices: Circuit aspects and fundamental behaviour , 1994 .

[106]  A.-S. Porret,et al.  A novel approach to charge-based non-quasi-static model of the MOS transistor valid in all modes of operation , 2000 .