Receiver of semiconductor memory apparatus

A receiver of a semiconductor memory device is provided to enhance operation reliability of a semiconductor memory device by outputting a stable output signal in a transition timing of an input signal. A first input transistor(200) is turned on in case an input signal is more than a specific level. A second input transistor is turned on in case an input signal is less than a specific level. A first output node voltage control part enhances a voltage level of an output node if the first input transistor is turned on. A second output node voltage control part(700) lowers a voltage level of an output node if the second input transistor is turned on. A third input transistor(400) enhances a voltage level of an output node in case a reverse signal of an input signal is less than a specific level. A fourth input transistor lowers a voltage level of an output node in case a reverse signal of an input signal is more than a specific level.