Verifying Multi-core Schedulability with Data Decision Diagrams

Over the past few years, numerous real-time and embedded systems have been adopting multi-core architectures for either better performances, or energy efficiency. For the case of real-time applications, where tasks can have critical deadlines, it is desirable to ensure the schedulability of the application statically, taking into account the possible software and hardware failures. While a lot of effort have been made to handle software misbehaviours, resilience to hardware failures has often been overlooked.

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