An overview of advances in reconfigurable computing systems

This paper points to selected readings in the newly emerging field of reconfigurable computing. It starts from the classification of Radunovic and Milutinovic (1998) and, for each class, a list of best papers is offered. The selection was based on a poll among students doing thesis work in the field. Furthermore, a list of the important issues in designing configurable systems is given, and the text accompanying each presented paper specifies the way the systems address these issues.

[1]  Richard J. Carter,et al.  Teramac-configurable custom computing , 1995, Proceedings IEEE Symposium on FPGAs for Custom Computing Machines.

[2]  Jürgen Becker,et al.  A novel sequencer hardware for application specific computing , 1997, Proceedings IEEE International Conference on Application-Specific Systems, Architectures and Processors.

[3]  Brad L. Hutchings,et al.  A dynamic instruction set computer , 1995, Proceedings IEEE Symposium on FPGAs for Custom Computing Machines.

[4]  Mark Shand,et al.  Programmable active memories: reconfigurable systems come of age , 1996, IEEE Trans. Very Large Scale Integr. Syst..

[5]  Harvey F. Silverman,et al.  Processor reconfiguration through instruction-set metamorphosis , 1993, Computer.

[6]  Vivek Sarkar,et al.  Baring It All to Software: Raw Machines , 1997, Computer.

[7]  Duncan A. Buell,et al.  Splash 2 - FPGAs in a custom computing machine , 1996 .

[8]  B. Pottier,et al.  Flexible parallel FPGA-based architectures with ArMen , 1994, 1994 Proceedings of the Twenty-Seventh Hawaii International Conference on System Sciences.

[9]  Reiner W. Hartenstein,et al.  A datapath synthesis system for the reconfigurable datapath architecture , 1995, ASP-DAC '95.

[10]  George J. Milne,et al.  Scalable cellular array architecture , 1992 .

[11]  Daniel P. Lopresti,et al.  SPLASH: A Reconfigurable Linear Logic Array , 1990, ICPP.

[12]  Michael Bolotski Andr,et al.  Unifying FPGAs and SIMD Arrays , 1994 .

[13]  Veljko M. Milutinovic.  Surviving the design of a 200 MHz RISC microprocessor - lessons learned , 1997 .

[14]  Veljko Milutinovic,et al.  Surviving the Design of Microprocessor and Multimicroprocessor Systems: Lessons Learned , 2000 .

[15]  André DeHon,et al.  MATRIX: a reconfigurable computing architecture with configurable instruction distribution and deployable resources , 1996, 1996 Proceedings IEEE Symposium on FPGAs for Custom Computing Machines.

[16]  Jean Vuillemin,et al.  Introduction to programmable active memories , 1990 .

[17]  J. Nunamaker,et al.  Proceedings of the 32nd Hawaii International Conference on System Sciences , 1999 .

[18]  Vivek Sarkar,et al.  The Raw Compiler Project , 1999 .

[19]  Viktor K. Prasanna,et al.  Seeking Solutions in Configurable Computing , 1997, Computer.

[20]  Moshe Sipper,et al.  Static and Dynamic Configurable Systems , 1999, IEEE Trans. Computers.

[21]  John Wawrzynek,et al.  Garp: a MIPS processor with a reconfigurable coprocessor , 1997, Proceedings. The 5th Annual IEEE Symposium on Field-Programmable Custom Computing Machines Cat. No.97TB100186).

[22]  Jürgen Becker,et al.  Performance Analysis in CoDe-X Partitioning for Structural Programmable Accelerators , 1997, CODES.

[23]  Carl Ebeling,et al.  RaPiD - Reconfigurable Pipelined Datapath , 1996, FPL.

[24]  Reiner W. Hartenstein,et al.  A reconfigurable data-driven ALU for Xputers , 1994, Proceedings of IEEE Workshop on FPGA's for Custom Computing Machines.