Self-aligned UMOSFET's with a specific on-resistance of 1 mΩ.cm2

This paper describes an improved UMOSFET with an ultralow specific on-resistance. This device utilizes a self-aligned process that permits closely spaced vertical trench gates with a unit cell of 6 µm. This allows for a remarkable increase of channel density and, therefore, reduces the on-resistance per unit area significantly. Experimental devices have been fabricated, and a specific on-resistance of 1.0 mΩ . cm2with a breakdown voltage of 30 V has been achieved. This specific on-resistance is the lowest value ever reported for FET's.

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