Graph Theoretical Analysis and Design of Multistage Interconnection Networks
暂无分享,去创建一个
[1] Janak H. Patel. Performance of Processor-Memory Interconnections for Multiprocessors , 1981, IEEE Transactions on Computers.
[2] David J. Kuck,et al. The Burroughs Scientific Processor (BSP) , 1982, IEEE Transactions on Computers.
[3] Dharma P. Agrawal,et al. VLSI Performance of Multistage Interconnection Network Using 4*4 Switches , 1982, ICDCS.
[4] Tse-Yun Feng,et al. The Universality of the Shuffle-Exchange Network , 1981, IEEE Transactions on Computers.
[5] Svetlana P. Kartashev,et al. Problems of Designing Supersystems with Dynamic Architectures , 1980, IEEE Transactions on Computers.
[6] Dharma P. Agrawal,et al. Design and Performance of Generalized Interconnection Networks , 1983, IEEE Transactions on Computers.
[7] Howard Jay Siegel,et al. Study of multistage SIMD interconnection networks , 1978, ISCA '78.
[8] Tse-Yun Feng. Data Manipulating Functions in Parallel Processors and Their Implementations , 1974, IEEE Transactions on Computers.
[9] Dharma P. Agrawal,et al. A Pipelined Pseudoparallel System Architecture for Real-Time Dynamic Scene Analysis , 1982, IEEE Transactions on Computers.
[10] Gerald M. Masson,et al. A Sampler of Circuit Switching Networks , 1979, Computer.
[11] Kenneth E. Batcher,et al. Bit-Serial Parallel Processing Systems , 1982, IEEE Transactions on Computers.
[12] Dharma P. Agrawal,et al. Testing and Fault Tolerance of Multistage Interconnection Networks , 1982, Computer.
[13] Dharma P. Agrawal,et al. Performance Analysis of FFT Algorithms on Multiprocessor Systems , 1983, IEEE Transactions on Software Engineering.
[14] Daniel M. Dias,et al. Analysis and Simulation of Buffered Delta Networks , 1981, IEEE Transactions on Computers.
[15] Howard Jay Siegel,et al. A Model of SIMD Machines and a Comparison of Various Interconnection Networks , 1979, IEEE Transactions on Computers.
[16] Dharma P. Agrawal,et al. Design and performance of a general class of interconnection networks , 1982, ICPP.
[17] Tilak Agerwala,et al. Communication Issues in the Design and Analysis of Parallel Algorithms , 1981, IEEE Transactions on Software Engineering.
[18] D. C. Opferman,et al. On a class of rearrangeable switching networks part I: Control algorithm , 1971 .
[19] Clark D. Thomborson,et al. Generalized Connection Networks for Parallel Processor Intercommunication , 1978, IEEE Trans. Computers.
[20] Douglas Stott Parker,et al. Notes on Shuffle/Exchange-Type Switching Networks , 1980, IEEE Transactions on Computers.
[21] Tse-Yun Feng,et al. On a Class of Multistage Interconnection Networks , 1980, IEEE Transactions on Computers.
[22] Gordon Bell,et al. C.mmp: a multi-mini-processor , 1972, AFIPS '72 (Fall, part II).
[23] Duncan H. Lawrie,et al. Access and Alignment of Data in an Array Processor , 1975, IEEE Transactions on Computers.
[24] Kenneth E. Batcher,et al. The flip network in staran , 1976 .
[25] Tse-Yun Feng,et al. The Reverse-Exchange Interconnection Network , 1980, IEEE Trans. Computers.
[26] Sung-Chun Kim. Graph theoretic approach to multistage interconnection networks , 1982 .