A memory-efficient deblocking filter for H.264/AVC video coding
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A memory-efficient architecture design for a de-blocking filter in H.264/AVC is presented. We use the novel column-of-pixel data arrangement to facilitate the memory access and reuse the pixel value. Further, we propose a hybrid filter scheduling to improve the system throughput. As compared with some existing approaches of realizing the de-blocking filter, the proposed design saves about one-half of the processing cycles. With the novel data arrangement and hybrid filter scheduling, an efficient architecture design is implemented. Further, it is evaluated on an H.264 system and easily achieved real-time decoding with 1080 HD (1920/spl times/1088 @ 30 fps) when the working frequency is 100 MHz.
[1] Wei Zhang,et al. An efficient architecture for adaptive deblocking filter of H.264/AVC video coding , 2004, IEEE Trans. Consumer Electron..
[2] Itu-T. Video coding for low bitrate communication , 1996 .
[3] Liang-Gee Chen,et al. Architecture design for deblocking filter in H.264/JVT/AVC , 2003, 2003 International Conference on Multimedia and Expo. ICME '03. Proceedings (Cat. No.03TH8698).
[4] Jani Lainema,et al. Adaptive deblocking filter , 2003, IEEE Trans. Circuits Syst. Video Technol..