Use of SSTA Tools for Evaluating BTI Impact on Combinational Circuits

This paper presents an extensive statistical study on the impact of bias temperature instability (BTI) on digital circuits. A statistical framework for the evaluation of BTI at the electrical (SPICE) level, enhanced by an atomistic model for BTI, is introduced. This framework is then employed to perform the timing analysis of different combinational paths using cells from a given library, aiming to statistically model BTI at the higher abstraction level. A statistical static timing analysis (SSTA) method is then performed and the results are compared to detailed simulations using atomistic models based on experimental data. The comparison between the two methods shows that for large paths both methods converge to the same distribution for the delay while for short paths the delay distributions are different causing the SSTA method to generate misleading results. An analysis is then performed in order to understand and formalize the results.

[1]  S. Rauch,et al.  Review and Reexamination of Reliability Effects Related to NBTI-Induced Statistical Variations , 2007, IEEE Transactions on Device and Materials Reliability.

[2]  Majid Sarrafzadeh,et al.  Fourier Series Approximation for Max Operation in Non-Gaussian and Quadratic Statistical Static Timing Analysis , 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[3]  Yu Cao,et al.  New Generation of Predictive Technology Model for Sub-45 nm Early Design Exploration , 2006, IEEE Transactions on Electron Devices.

[4]  Yu Cao,et al.  An efficient method to identify critical gates under circuit aging , 2007, 2007 IEEE/ACM International Conference on Computer-Aided Design.

[5]  R. Degraeve,et al.  Origin of NBTI variability in deeply scaled pFETs , 2010, 2010 IEEE International Reliability Physics Symposium.

[6]  D. Schroder,et al.  Negative bias temperature instability: Road to cross in deep submicron silicon semiconductor manufacturing , 2003 .

[7]  Min Chen,et al.  Statistical Modeling and Simulation of Threshold Variation Under Random Dopant Fluctuations and Line-Edge Roughness , 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[8]  T. Grasser,et al.  The time dependent defect spectroscopy (TDDS) for the characterization of the bias temperature instability , 2010, 2010 IEEE International Reliability Physics Symposium.

[9]  Fan Yang,et al.  Statistical reliability analysis under process variation and aging effects , 2009, 2009 46th ACM/IEEE Design Automation Conference.

[10]  Sangwoo Han,et al.  NBTI-aware statistical timing analysis framework , 2010, 23rd IEEE International SOC Conference.

[11]  D. Wright,et al.  Problematic standard errors and confidence intervals for skewness and kurtosis , 2011, Behavior research methods.

[12]  T. Grasser,et al.  The statistical analysis of individual defects constituting NBTI and its implications for modeling DC- and AC-stress , 2010, 2010 IEEE International Reliability Physics Symposium.

[13]  Sachin S. Sapatnekar,et al.  NBTI-Aware Synthesis of Digital Circuits , 2007, 2007 44th ACM/IEEE Design Automation Conference.

[14]  Yu Cao,et al.  The Impact of NBTI Effect on Combinational Circuit: Modeling, Simulation, and Analysis , 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[15]  L. G. Parratt,et al.  Probability and Experimental Errors in Science , 1973 .

[16]  Frederick Vu.  Central Limit Theorem , 2015 .

[17]  U. Hilleringmann,et al.  Correlation Analysis of the Statistical Electrical Parameter Fluctuations in 50 nm MOS-Transistors , 1998, 28th European Solid-State Device Research Conference.

[18]  D. Ielmini,et al.  A New NBTI Model Based on Hole Trapping and Structural Relaxation in MOS Dielectrics , 2009, IEEE Transactions on Electron Devices.

[19]  Statistical Methods For Semiconductor Chip Design TM Version 1 . 0 02 December 2008 , 2008 .

[20]  Andrew R. Brown,et al.  Simulation of intrinsic parameter fluctuations in decananometer and nanometer-scale MOSFETs , 2003 .

[21]  G. Groeseneken,et al.  Atomistic approach to variability of bias-temperature instability in circuit simulations , 2011, 2011 International Reliability Physics Symposium.

[22]  David Blaauw,et al.  Statistical Timing Analysis: From Basic Principles to State of the Art , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[23]  Sachin S. Sapatnekar,et al.  A Scalable Statistical Static Timing Analyzer Incorporating Correlated Non-Gaussian and Gaussian Parameter Variations , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[24]  J. Goodier.  The Concise Encyclopedia of Statistics , 2009 .

[25]  T. Grasser,et al.  Temperature dependence of the emission and capture times of SiON individual traps after positive bias temperature stress , 2011 .