Method for controlling the data output timing of a memory device and the device therefor

A data output control device of the memory device using the DLL clock signal, and an output driver to output data, and depending on the CAS latency with a CAS latency control unit for generating a signal for controlling the operation timing of the output driver, the CAS latency control It generates a signal for controlling the output driver by using the time difference between the external clock supplied from the outside of the DLL clock sinhogwa the memory device.