Historically, conventional GPS receivers have used 1.0 chip early-late correlator spacing in the implementation of delay lock loop s (DLLs), However, there are distinct advantages to narrowing this spacing, especially in C/A-code tracking applications. These advantages are the reduction of tracking errors in the presence of both noise and multipath. The primary disadvantage i s that a wider precorrelation bandwidth is required, coupled with higher sample rates and higher digital signal processing rates. However, with current CMOS technology, this is easily achievable and well worth the price. Noise reduction is achieved with narrower spacing because the noise components of the early and late signals are correlated and ten d to cancel, provided that early and late processing are simultaneous (not dithered). Multipath effects are reduced because the DLL discriminator is less distorted by the delayed multipath signal. This paper presents the derivation of these narrow correlator spacing improvements, verified by simulated and tested performance.
[1]
G.B. Frank,et al.
Next generation digital GPS receiver
,
1990,
IEEE Aerospace and Electronic Systems Magazine.
[2]
Gérard Lachapelle,et al.
Analysis of a High-Performance C/A-Code GPS Receiver in
,
1992
.
[3]
Patrick C. Fenton,et al.
NOVATEL'S GPS RECEIVER THE HIGH PERFORMANCE OEM SENSOR OF THE FUTURE
,
1991
.
[4]
Chris Moyle,et al.
Architecture and Field Test Results of a Digital GPS Receiver
,
1987
.
[5]
Gérard Lachapelle,et al.
Marine DGPS Using Code and Carrier in a Multipath Environment
,
1989
.