The multiple variable order problem for binary decision diagrams: theory and practical application

Reduced Ordered Binary Decision Diagrams (ROBDDs) gained widespread use in logic design verification, test generation, fault simulation, and logic synthesis [17, 7]. Since the size of an ROBDD heavily depends on the variable order used, there is a strong need to find variable orders that minimize the number of nodes in an ROBDD. In certain applications we have to cope with ROBDDs with different variable orders, whereas further manipulations of these ROBDDs require common variable orders. In this paper we give a theoretical background for this "Multiple Variable Order problem". Moreover, we solve the problem to transform ROBDDs with different variable orders into a good common variable order using dynamic variable ordering techniques.

[1]  藤田 昌宏,et al.  Evaluation and Improvements of Boolean Comparison Method Based on Binary Decision Diagrams , 1988 .

[2]  R. Rudell Dynamic variable ordering for ordered binary decision diagrams , 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).

[3]  R. Rudell Dynamic variable ordering for ordered binary decision diagrams , 1993, ICCAD 1993.

[4]  Rolf Drechsler,et al.  Functional simulation using binary decision diagrams , 1997, ICCAD 1997.

[5]  Fabio Somenzi,et al.  CUDD: CU Decision Diagram Package Release 2.2.0 , 1998 .

[6]  Rolf Drechsler,et al.  A genetic algorithm for variable ordering of obdds , 1996 .

[7]  Albert R. Wang,et al.  Logic verification using binary decision diagrams in a logic synthesis environment , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.

[8]  I. Wegener,et al.  SIMULATED ANNEALING TO IMPROVE VARIABLE ORDERINGS FOR OBDDsBeate , 1995 .

[9]  Gianpiero Cabodi,et al.  Improved reachability analysis of large finite state machines , 1996, Proceedings of International Conference on Computer Aided Design.

[10]  Hiroshige Fujii,et al.  Interleaving based variable ordering methods for ordered binary decision diagrams , 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).

[11]  Masahiro Fujita,et al.  Evaluation and improvement of Boolean comparison method based on binary decision diagrams , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.

[12]  Randal E. Bryant,et al.  Efficient implementation of a BDD package , 1991, DAC '90.

[13]  Christoph Meinel,et al.  Binary Decision Diagrams and the Multiple Variable Order Problem , 1998, Universität Trier, Mathematik/Informatik, Forschungsbericht.

[14]  Masahiro Fujita,et al.  On variable ordering of binary decision diagrams for the application of multi-level logic synthesis , 1991, Proceedings of the European Conference on Design Automation..

[15]  C. Y. Lee Representation of switching circuits by binary-decision programs , 1959 .

[16]  Robert K. Brayton,et al.  Dynamic variable reordering for BDD minimization , 1993, Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference.

[17]  Rolf Drechsler,et al.  Functional simulation using binary decision diagrams , 1997, 1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

[18]  Sharad Malik,et al.  Fast functional simulation using branching programs , 1995, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

[19]  Sharad Malik,et al.  Fast functional simulation using branching programs , 1995, ICCAD.

[20]  A.L. Sangiovanni-Vincentelli,et al.  Fast discrete function evaluation using decision diagrams , 1995, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

[21]  Shuzo Yajima,et al.  The Complexity of the Optimal Variable Ordering Problems of Shared Binary Decision Diagrams , 1993, ISAAC.

[22]  Sheldon B. Akers,et al.  Binary Decision Diagrams , 1978, IEEE Transactions on Computers.

[23]  Bernd Becker,et al.  Solving the Multiple Variable Order Problem for Binary Decision Diagrams by Use of Dynamic Reordering Techniques , 1999 .

[24]  Alexander Saldanha,et al.  Fast discrete function evaluation using decision diagrams , 1995, ICCAD.

[25]  Bernard M. E. Moret,et al.  Decision Trees and Diagrams , 1982, CSUR.

[26]  Randal E. Bryant,et al.  Symbolic Boolean manipulation with ordered binary-decision diagrams , 1992, CSUR.

[27]  G. Cabodi,et al.  Improved reachability analysis of large finite state machines , 1996, ICCAD 1996.

[28]  Robert K. Brayton,et al.  Reachability analysis using partitioned-ROBDDs , 1997, 1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

[29]  Randal E. Bryant,et al.  Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.

[30]  Hiroshi Sawada,et al.  Minimization of binary decision diagrams based on exchanges of variables , 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.

[31]  Chikahiro Hori,et al.  Interleaving based variable ordering methods for ordered binary decision diagrams , 1993, ICCAD.

[32]  Beate Bollig,et al.  Improving the Variable Ordering of OBDDs Is NP-Complete , 1996, IEEE Trans. Computers.

[33]  R. Brayton,et al.  Reachability analysis using partitioned-ROBDDs , 1997, ICCAD 1997.