JPEG2000 Decoder Architecture for Mobile Applications

This paper proposes a novel decoder architecture for the brand-new image coding standard JPEG2000. Innovative technologies involved in JPEG2000 framework will lead to rapid development of new mobile multimedia applications. In this scenario a well known critical factor is that computational resources available on tetherless terminals are limited and valuable. Dedicated hardware units can completely fulfill elaboration tasks, joining high system performance with reasonable power supply requirements. Starting from a preliminary overview of standard’s architecture and capabilities, a flexible DSP/FPGA based solution, obtained as a result of computational profiling analisys, is described. Then finite precision effects are addressed, in order to implement an efficient Wavelet fixed point coprocessor. Finally, FPGA logic synthesis results are presented for most critical units.