90 Gbit/s 0.5 W decision circuit using InP/InGaAs double heterojunction bipolar transistors

A high-speed low-power decision circuit using InP/InGaAs double-heterojunction bipolar transistors (DHBTs) has been successfully designed and fabricated. The DHBTs exhibit a cutoff frequency fT and maximum oscillation frequency fmax of 232 and 360 GHz, respectively, at a collector current density of 2.5 mA/µm2. To boost the operating speed, a novel master–slave D-type flip-flop (MS-DFF) was used. Up to 90 Gbit/s operation was achieved with low power consumption of 0.5 W. These results demonstrate that InP-based DHBTs are attractive for making ultra-high-performance ICs for future optical communications systems operating at bit rates of 100 Gbit/s or more.