Fast Discrete Wavelet Transformation Using FPGAs and Distributed Arithmetic

The discrete wavelet transform has gained the reputation of being a very effective sig- nal analysis tool for many practical applications. However, due to its computation-intensive na- ture, current implementations of the transform fall short of meeting real-time processing re- quirements of most applications. This paper describes a parallel implementation of the discrete wavelet transform and its inverse using high-density field programmable logic devices (FPGAs). The implementation exploits the lookup table-based architecture of Virtex FPGAs, by reformu- lating the wavelet computation in accordance with the distributed arithmetic algorithm. Perform- ance results show that the distributed arithmetic formulation results in a considerable perform- ance gain compared with the conventional arithmetic formulation of the wavelet computation. Finally, we show that the FPGA implementation outperforms alternative software implementa- tions of the discrete wavelet transform.