Asymmetric hybrid multilevel inverter with reduced harmonic using hybrid modulation technique

This paper studies the Asymmetric cascaded three phase multilevel inverter developed with hybrid modulation technique applied for an industrial application. The aim of this paper to reduce the Total harmonics distortion in the cascaded multi level inverter by introducing the new concept to develop the three phase CMLI. This inverter has two segments, one segment has H-bridge inverter and another segment has sequential arrangement of power semi conductor switches with asymmetrical voltage source in the ratio of 1:2. Similarly develop the segments for other phases. This new topology is called as Hybrid MLI. This hybrid MLI is used to reduce the no of semiconductor device requirement and the Total harmonics distortion.  The inverter is controlled by Phase disposition (PD) and alternative phase opposition disposition PWM technique (APOD). This control technique is used to minimize the current harmonic and increase the system performance. The circuit is simulated using Matlab circuit and its performance is compared using PD and APOD PWM techniques and verified with simulation results.

[1]  Mariusz Malinowski,et al.  A Survey on Cascaded Multilevel Inverters , 2010, IEEE Transactions on Industrial Electronics.

[2]  Ataollah Mokhberdoran,et al.  Cascade-multi-cell multilevel converter with reduced number of switches , 2014 .

[3]  ZhiHong Bai,et al.  Conformation of Multilevel Current Source Converter Topologies Using the Duality Principle , 2008, IEEE Transactions on Power Electronics.

[4]  Malligunta Kiran Kumar,et al.  Analysis of Series/Parallel Multilevel Inverter with Symmetrical and Asymmetrical Configurations , 2019 .

[5]  Zahriladha Zakaria,et al.  Modeling and Simulation of Nine-Level Cascaded H-Bridge Multilevel Inverter , 2018 .

[6]  Arindam Ghosh,et al.  Switching Characterization of Cascaded Multilevel-Inverter-Controlled Systems , 2008, IEEE Transactions on Industrial Electronics.

[7]  M. Sasikumar,et al.  DESIGN AND IMPLEMENTATION OF HYBRID SPWM CONTROL FOR CASCADED H-BRIDGE MULTI LEVEL INVERTER FOR MOTOR DRIVES , 2014 .

[8]  Anish Benny,et al.  Asymmetric multilevel hybrid inverter with reduced number of switches , 2014, 2014 Annual International Conference on Emerging Research Areas: Magnetics, Machines and Drives (AICERA/iCMMD).

[9]  Adnan Umar Khan,et al.  Cascaded Symmetric Multilevel Inverter with Reduced Number of Controlled Switches , 2017 .

[10]  Abhijit Dasgupta,et al.  A comparative Analysis of Symmetrical and Asymmetrical Cascaded Multilevel Inverter Having Reduced Number of Switches and DC Sources , 2017 .

[11]  V Joshi Manohar.  Grid Interconnection of PV System Using Symmetric and Asymmetric MLI Topology , 2018 .

[12]  Y. N. Bhosale,et al.  A review on multilevel inverter topology , 2013, 2013 International Conference on Power, Energy and Control (ICPEC).

[13]  S. Mariethoz,et al.  Design and control of asymmetrical multi-level inverters , 2002, IEEE 2002 28th Annual Conference of the Industrial Electronics Society. IECON 02.

[14]  Alfred Rufer,et al.  A Generalized Design Principle of a Uniform Step Asymmetrical Multilevel Converter For High Power Conversion , 2001 .

[15]  Vassilios G. Agelidis,et al.  Analysis of multicarrier PWM methods for a single-phase five level inverter , 2001, 2001 IEEE 32nd Annual Power Electronics Specialists Conference (IEEE Cat. No.01CH37230).

[16]  L. Padma Suresh,et al.  A brief review on multi level inverter topologies , 2016, 2016 International Conference on Circuit, Power and Computing Technologies (ICCPCT).

[17]  Ataollah Mokhberdoran,et al.  Selective harmonic elimination method for wide range of modulation indexes in multilevel inverters using ICA , 2014 .

[18]  Fang Zheng Peng,et al.  Multilevel inverters: a survey of topologies, controls, and applications , 2002, IEEE Trans. Ind. Electron..

[19]  Ahmed Naddami,et al.  A smart cascaded H-bridge multilevel inverter with an optimized modulation techniques increasing the quality and reducing harmonics , 2019, International Journal of Power Electronics and Drive Systems (IJPEDS).

[20]  Bin Wu,et al.  Multilevel Voltage-Source-Converter Topologies for Industrial Medium-Voltage Drives , 2007, IEEE Transactions on Industrial Electronics.

[21]  P.K. Steimer,et al.  Practical medium voltage converter topologies for high power applications , 2001, Conference Record of the 2001 IEEE Industry Applications Conference. 36th IAS Annual Meeting (Cat. No.01CH37248).

[22]  P Somasundaram,et al.  A New Seven Level Symmetrical Inverter with Reduced Switch Count , 2018 .