Redundant decoder for integrated semiconductor memory

PURPOSE: To activate the redundant decoder even irreversibly by electrically simulating the state of one separated connection at the time of existence of separatable connection by a driving circuit at each decoder stage. CONSTITUTION: The decoder is equipped with plural decoder stages, each shown by 1 including one switching transistor T and one separatable connection F and at least one charging transistor. Each decoder stage contains one driving circuit 2 disposed between the transistor T and the separatable connection F, and at the time of existence of the separatable connection F by this driving circuit, the state of one separated connection F can electrically be simulated. Consequently, the redundant decoder is activated even irreversibly. COPYRIGHT: (C)1989,JPO