A shallow trench isolation using nitric oxide (NO)-annealed wall oxide to suppress inverse narrow width effect
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Jae-Beom Park | Gyuhan Yoon | Byung-Seop Hong | Woo Jin Kim | W. Kim | Jongoh Kim | Jongoh Kim | Taewoo Kim | Jae-Beom Park | Byung-Seop Hong | Gyuhan Yoon | Taewoo Kim
[1] A. Chatterjee,et al. A shallow trench isolation using LOCOS edge for preventing corner effects for 0.25/0.18 /spl mu/m CMOS technologies and beyond , 1996, International Electron Devices Meeting. Technical Digest.
[2] Percy V. Gilbert,et al. A 0.25 /spl mu/m CMOS technology with 45 /spl Aring/ NO-nitrided oxide , 1995, Proceedings of International Electron Devices Meeting.
[3] A. Ono,et al. TED control technology for suppression of reverse narrow channel effect in 0.1 /spl mu/m MOS devices , 1997, International Electron Devices Meeting. IEDM Technical Digest.
[4] M. Sasago,et al. A new isolation method with boron-implanted sidewalls for controlling narrow-width effect , 1987, IEEE Transactions on Electron Devices.
[5] Hiroshi Iwai,et al. Effects of boron penetration and resultant limitations in ultra thin pure-oxide and nitrided-oxide gate-films , 1990, International Technical Digest on Electron Devices.
[6] E. H. Li,et al. The narrow-channel effect in MOSFET's with semi-recessed oxide structures , 1990 .
[7] Inverse-narrow-width effect of deep sub-micrometer MOSFETs with LOCOS isolation , 1997 .
[8] A Novel Shallow Trench Isolation with Mini-Spacer Technology , 1998 .
[9] S.W. Sun,et al. A novel 0.25 /spl mu/m shallow trench isolation technology , 1996, International Electron Devices Meeting. Technical Digest.