A new method for testing mixed analog and digital circuits

In this paper a new method is proposed for observing analog test points inside integrated circuits that enables the simultaneous observation of a large number of points. The method permits the removal of the analog multiplexer from the signal path and a reduction of the load introduced at the observed test points. A charge coupled device analog shift register is used to sample input voltage and shift out a charge that is proportional to the input voltage.

[1]  K. Suzuki,et al.  A CMOS CCD video delay line , 1984, 1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[2]  D. Ong,et al.  An all-implanted CCD/CMOS process , 1981, IEEE Transactions on Electron Devices.

[3]  T. T. Sheng,et al.  Oxide Isolation for Double‐Polysilicon VLSI Devices , 1983 .

[4]  John Paul Shen,et al.  Inductive Fault Analysis of MOS Integrated Circuits , 1985, IEEE Design & Test of Computers.

[5]  Thomas W. Williams,et al.  Design for testability of mixed signal integrated circuits , 1988, International Test Conference 1988 Proceeding@m_New Frontiers in Testing.

[6]  P. P. Fasang,et al.  Design for testability for mixed analog/digital ASICs , 1988, Proceedings of the IEEE 1988 Custom Integrated Circuits Conference.

[7]  A. Mohsen,et al.  Linearity of electrical charge injection into charge-coupled devices , 1974 .

[8]  Dieter K. Schroder,et al.  Advanced MOS devices , 1987 .