Time-Interleaved Sampled-and-Hold S2I Circuit for High-Speed Current-Mode ADCs
暂无分享,去创建一个
[1] Klaas Bult,et al. The CMOS gain-boosting technique , 1991 .
[2] W. Guggenbuhl,et al. A high-swing, high-impedance MOS cascode circuit , 1990 .
[3] John B. Hughes,et al. S/sup 2/I: a two-step approach to switched-currents , 1993, 1993 IEEE International Symposium on Circuits and Systems.
[4] Kenneth W. Moulding,et al. An 8 MHz, 80 Ms/s switched-current filter , 1994, Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94.
[5] John B. Hughes,et al. S2I: A Two-step Approach to Switched-Currents , 1993, ISCAS.
[6] John B. Hughes,et al. Second generation switched-current signal processing , 1990, IEEE International Symposium on Circuits and Systems.
[7] Christofer Toumazou,et al. Regulated Cascade Switched-Current Memory Cell , 1990 .
[8] K. Hirata,et al. A 10 b 50 MHz pipelined CMOS A/D converter with S/H , 1993 .
[9] J. E. Franca,et al. A two-step flash ADC for digital CMOS technology , 1994 .