Lightweight cipher implementations on embedded processors

“Internet on things” is a growing trend towards connecting every electronic device to each other. In one end of the communication, there are sensor nodes, which would generally be power and resource constrained. On the other end, there are more complex base systems, which will accumulate information from multiple sensors. This communication may comprise of sensitive information, which brings the need of a secure communication protocol. Lightweight ciphers have to be used due to the presence of the resource constraint sensors. The standard lightweight ciphers are hardware friendly but can be slow in software. This can hinder the performance in the base systems which are generally built with microprocessors. Hardware-software co-design can be used to improve the performance. In this paper, we show that the performance of a standard lightweight block cipher like Present can be improved by having specific instructions for bit permutation; a vital component in modern lightweight block ciphers. We show experimentally the performance benefits by adding bit permutation instructions for the NIOS II processor.

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