Multi-bit fractional equalization for multi-Gb/s inductively coupled connectors

Multi-bit fractional equalization at the driver side allows for multi-Gb/s signaling across transformers which suffer from excessive ISI in inductively coupled connectors and backplanes. When an inductively coupled element is place in a transmission line or the gap between inductors in a transformer increases, the amplitude of the coupled pulse is decreased while the natural decay of the pulse is maintained. By removing the effects of the natural decaying tail of the pulse created by coupling an NRZ signal across a transformer, high-speed inductive coupling can be achieved over the larger transformers required by connectors and backplanes.

[1]  R. D. Gitlin,et al.  Fractionally-spaced equalization: An improved digital transversal equalizer , 1981, The Bell System Technical Journal.

[2]  P. Franzon,et al.  2.8 Gb/s inductively coupled interconnect for 3D ICs , 2005, Digest of Technical Papers. 2005 Symposium on VLSI Circuits, 2005..

[3]  W.J. Dally,et al.  Transmitter equalization for 4-Gbps signaling , 1997, IEEE Micro.

[4]  G. Ungerboeck,et al.  Fractional Tap-Spacing Equalizer and Consequences for Clock Recovery in Data Modems , 1976, IEEE Trans. Commun..

[5]  Paul D. Franzon,et al.  4 Gbps high-density AC coupled interconnection , 2002, Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285).

[6]  P. Franzon,et al.  Fine Pitch Inductively Coupled Connectors for Multi-Gbps Pulse Signaling , 2006, 2006 IEEE Electrical Performane of Electronic Packaging.

[7]  P. Franzon,et al.  Inductively Coupled Connectors and Sockets for Multi-Gb/s Pulse Signaling , 2008, IEEE Transactions on Advanced Packaging.

[8]  P. Franzon,et al.  Inductively Coupled Board-to-Board Connectors , 2005, Proceedings Electronic Components and Technology, 2005. ECTC '05..

[9]  T. Sakurai,et al.  A 1 Tb/s 3 W Inductive-Coupling Transceiver for 3D-Stacked Inter-Chip Clock and Data Link , 2007, IEEE Journal of Solid-State Circuits.

[10]  N. Miura,et al.  A 1.2Gb/s/pin wireless superconnect based on inductive inter-chip signaling (IIS) , 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).