AMULET3i-an asynchronous system-on-chip

AMULET3i is the third generation asynchronous ARM-compatible microprocessor subsystem developed at the University of Manchester. It is internally modular being based around the MARBLE asynchronous on-chip bus, and is also extensible through the addition of conventional clocked synthesizable peripherals via an on-chip synchronous peripheral bus. As such it is capable of forming the core of a wide range of system-on-chip applications, bringing asynchronous design into commercial use in a flexible and easy-to-use configuration. Its performance and area are comparable with clocked equivalents, and its low-power and electromagnetic emission characteristics give it unique capabilities in appropriate applications.

[1]  Jim D. Garside,et al.  AMULET2e: an asynchronous embedded controller , 1997, Proceedings Third International Symposium on Advanced Research in Asynchronous Circuits and Systems.

[2]  Paul I. Pénzes,et al.  The design of an asynchronous MIPS R3000 microprocessor , 1997, Proceedings Seventeenth Conference on Advanced Research in VLSI.

[3]  Liam Goudge,et al.  Embedded control problems, Thumb, and the ARM7TDMI , 1995, IEEE Micro.

[4]  Simon Segars The ARM9 family-high performance microprocessors for embedded applications , 1998, Proceedings International Conference on Computer Design. VLSI in Computers and Processors (Cat. No.98CB36273).

[5]  S.B. Furber,et al.  AMULET3 revealed , 1999, Proceedings. Fifth International Symposium on Advanced Research in Asynchronous Circuits and Systems.

[6]  William John Bainbridge,et al.  Asynchronous macrocell interconnect using MARBLE , 1998, Proceedings Fourth International Symposium on Advanced Research in Asynchronous Circuits and Systems.

[7]  Steve Furber,et al.  ARM System Architecture , 1996 .

[8]  Nigel Charles Paver,et al.  The Design and Implementation of an Asynchronous Microprocessor , 1994 .

[9]  Takashi Nanya,et al.  TITAC-2: an asynchronous 32-bit microprocessor , 1998, Proceedings of 1998 Asia and South Pacific Design Automation Conference.

[10]  D. A. Edwards,et al.  The Balsa Asynchronous Circuit Synthesis System , 2000 .

[11]  Luciano Lavagno,et al.  Petrify: A Tool for Manipulating Concurrent Specifications and Synthesis of Asynchronous Controllers (Special Issue on Asynchronous Circuit and System Design) , 1997 .

[12]  Jim D. Garside,et al.  A result forwarding mechanism for asynchronous pipelined systems , 1997, Proceedings Third International Symposium on Advanced Research in Asynchronous Circuits and Systems.